Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / mips / au1000 / pb1200 / irqmap.c
blob8fcd0df86f93248e4e7a0fdf1eff33fd70647bae
1 /*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/errno.h>
26 #include <linux/init.h>
27 #include <linux/irq.h>
28 #include <linux/kernel_stat.h>
29 #include <linux/module.h>
30 #include <linux/signal.h>
31 #include <linux/sched.h>
32 #include <linux/types.h>
33 #include <linux/interrupt.h>
34 #include <linux/ioport.h>
35 #include <linux/timex.h>
36 #include <linux/slab.h>
37 #include <linux/random.h>
38 #include <linux/delay.h>
39 #include <linux/bitops.h>
41 #include <asm/bootinfo.h>
42 #include <asm/io.h>
43 #include <asm/mipsregs.h>
44 #include <asm/system.h>
45 #include <asm/mach-au1x00/au1000.h>
47 #ifdef CONFIG_MIPS_PB1200
48 #include <asm/mach-pb1x00/pb1200.h>
49 #endif
51 #ifdef CONFIG_MIPS_DB1200
52 #include <asm/mach-db1x00/db1200.h>
53 #define PB1200_INT_BEGIN DB1200_INT_BEGIN
54 #define PB1200_INT_END DB1200_INT_END
55 #endif
57 struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
58 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
61 int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
64 * Support for External interrupts on the PbAu1200 Development platform.
66 static volatile int pb1200_cascade_en=0;
68 irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
70 unsigned short bisr = bcsr->int_status;
71 int extirq_nr = 0;
73 /* Clear all the edge interrupts. This has no effect on level */
74 bcsr->int_status = bisr;
75 for( ; bisr; bisr &= (bisr-1) )
77 extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
78 /* Ack and dispatch IRQ */
79 do_IRQ(extirq_nr);
82 return IRQ_RETVAL(1);
85 inline void pb1200_enable_irq(unsigned int irq_nr)
87 bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
88 bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
91 inline void pb1200_disable_irq(unsigned int irq_nr)
93 bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
94 bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
97 static unsigned int pb1200_setup_cascade(void)
99 int err;
101 err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
102 0, "Pb1200 Cascade", &pb1200_cascade_handler);
103 if (err)
104 return err;
106 return 0;
109 static unsigned int pb1200_startup_irq(unsigned int irq)
111 if (++pb1200_cascade_en == 1) {
112 int res;
114 res = pb1200_setup_cascade();
115 if (res)
116 return res;
119 pb1200_enable_irq(irq);
121 return 0;
124 static void pb1200_shutdown_irq(unsigned int irq)
126 pb1200_disable_irq(irq);
127 if (--pb1200_cascade_en == 0)
128 free_irq(AU1000_GPIO_7, &pb1200_cascade_handler);
131 static struct irq_chip external_irq_type = {
132 #ifdef CONFIG_MIPS_PB1200
133 .name = "Pb1200 Ext",
134 #endif
135 #ifdef CONFIG_MIPS_DB1200
136 .name = "Db1200 Ext",
137 #endif
138 .startup = pb1200_startup_irq,
139 .shutdown = pb1200_shutdown_irq,
140 .ack = pb1200_disable_irq,
141 .mask = pb1200_disable_irq,
142 .mask_ack = pb1200_disable_irq,
143 .unmask = pb1200_enable_irq,
146 void _board_init_irq(void)
148 unsigned int irq;
150 #ifdef CONFIG_MIPS_PB1200
151 /* We have a problem with CPLD rev3. Enable a workaround */
152 if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
153 printk("\nWARNING!!!\n");
154 printk("\nWARNING!!!\n");
155 printk("\nWARNING!!!\n");
156 printk("\nWARNING!!!\n");
157 printk("\nWARNING!!!\n");
158 printk("\nWARNING!!!\n");
159 printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
160 printk("updated to latest revision. This software will not\n");
161 printk("work on anything less than CPLD rev4\n");
162 printk("\nWARNING!!!\n");
163 printk("\nWARNING!!!\n");
164 printk("\nWARNING!!!\n");
165 printk("\nWARNING!!!\n");
166 printk("\nWARNING!!!\n");
167 printk("\nWARNING!!!\n");
168 panic("Game over. Your score is 0.");
170 #endif
172 for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++) {
173 set_irq_chip_and_handler(irq, &external_irq_type,
174 handle_level_irq);
175 pb1200_disable_irq(irq);
179 * GPIO_7 can not be hooked here, so it is hooked upon first
180 * request of any source attached to the cascade