Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / cris / arch-v10 / drivers / eeprom.c
blobf1cac9dc75b8150bfdad17e904450f7738428438
1 /*!*****************************************************************************
2 *!
3 *! Implements an interface for i2c compatible eeproms to run under Linux.
4 *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
5 *! Johan.Adolfsson@axis.com
6 *!
7 *! Probing results:
8 *! 8k or not is detected (the assumes 2k or 16k)
9 *! 2k or 16k detected using test reads and writes.
11 *!------------------------------------------------------------------------
12 *! HISTORY
14 *! DATE NAME CHANGES
15 *! ---- ---- -------
16 *! Aug 28 1999 Edgar Iglesias Initial Version
17 *! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
18 *! Sep 03 1999 Edgar Iglesias Updated probe.
19 *! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
20 *! in the spin-lock.
22 *! (c) 1999 Axis Communications AB, Lund, Sweden
23 *!*****************************************************************************/
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/fs.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/wait.h>
32 #include <asm/uaccess.h>
33 #include "i2c.h"
35 #define D(x)
37 /* If we should use adaptive timing or not: */
38 /* #define EEPROM_ADAPTIVE_TIMING */
40 #define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
41 #define EEPROM_MINOR_NR 0
43 /* Empirical sane initial value of the delay, the value will be adapted to
44 * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
46 #define INITIAL_WRITEDELAY_US 4000
47 #define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
49 /* This one defines how many times to try when eeprom fails. */
50 #define EEPROM_RETRIES 10
52 #define EEPROM_2KB (2 * 1024)
53 /*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
54 #define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
55 #define EEPROM_16KB (16 * 1024)
57 #define i2c_delay(x) udelay(x)
60 * This structure describes the attached eeprom chip.
61 * The values are probed for.
64 struct eeprom_type
66 unsigned long size;
67 unsigned long sequential_write_pagesize;
68 unsigned char select_cmd;
69 unsigned long usec_delay_writecycles; /* Min time between write cycles
70 (up to 10ms for some models) */
71 unsigned long usec_delay_step; /* For adaptive algorithm */
72 int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
74 /* this one is to keep the read/write operations atomic */
75 wait_queue_head_t wait_q;
76 volatile int busy;
77 int retry_cnt_addr; /* Used to keep track of number of retries for
78 adaptive timing adjustments */
79 int retry_cnt_read;
82 static int eeprom_open(struct inode * inode, struct file * file);
83 static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
84 static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
85 loff_t *off);
86 static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
87 loff_t *off);
88 static int eeprom_close(struct inode * inode, struct file * file);
90 static int eeprom_address(unsigned long addr);
91 static int read_from_eeprom(char * buf, int count);
92 static int eeprom_write_buf(loff_t addr, const char * buf, int count);
93 static int eeprom_read_buf(loff_t addr, char * buf, int count);
95 static void eeprom_disable_write_protect(void);
98 static const char eeprom_name[] = "eeprom";
100 /* chip description */
101 static struct eeprom_type eeprom;
103 /* This is the exported file-operations structure for this device. */
104 const struct file_operations eeprom_fops =
106 .llseek = eeprom_lseek,
107 .read = eeprom_read,
108 .write = eeprom_write,
109 .open = eeprom_open,
110 .release = eeprom_close
113 /* eeprom init call. Probes for different eeprom models. */
115 int __init eeprom_init(void)
117 init_waitqueue_head(&eeprom.wait_q);
118 eeprom.busy = 0;
120 #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
121 #define EETEXT "Found"
122 #else
123 #define EETEXT "Assuming"
124 #endif
125 if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
127 printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
128 eeprom_name, EEPROM_MAJOR_NR);
129 return -1;
132 printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
135 * Note: Most of this probing method was taken from the printserver (5470e)
136 * codebase. It did not contain a way of finding the 16kB chips
137 * (M24128 or variants). The method used here might not work
138 * for all models. If you encounter problems the easiest way
139 * is probably to define your model within #ifdef's, and hard-
140 * code it.
143 eeprom.size = 0;
144 eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
145 eeprom.usec_delay_step = 128;
146 eeprom.adapt_state = 0;
148 #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
149 i2c_start();
150 i2c_outbyte(0x80);
151 if(!i2c_getack())
153 /* It's not 8k.. */
154 int success = 0;
155 unsigned char buf_2k_start[16];
157 /* Im not sure this will work... :) */
158 /* assume 2kB, if failure go for 16kB */
159 /* Test with 16kB settings.. */
160 /* If it's a 2kB EEPROM and we address it outside it's range
161 * it will mirror the address space:
162 * 1. We read two locations (that are mirrored),
163 * if the content differs * it's a 16kB EEPROM.
164 * 2. if it doesn't differ - write different value to one of the locations,
165 * check the other - if content still is the same it's a 2k EEPROM,
166 * restore original data.
168 #define LOC1 8
169 #define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
171 /* 2k settings */
172 i2c_stop();
173 eeprom.size = EEPROM_2KB;
174 eeprom.select_cmd = 0xA0;
175 eeprom.sequential_write_pagesize = 16;
176 if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
178 D(printk("2k start: '%16.16s'\n", buf_2k_start));
180 else
182 printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
185 /* 16k settings */
186 eeprom.size = EEPROM_16KB;
187 eeprom.select_cmd = 0xA0;
188 eeprom.sequential_write_pagesize = 64;
191 unsigned char loc1[4], loc2[4], tmp[4];
192 if( eeprom_read_buf(LOC2, loc2, 4) == 4)
194 if( eeprom_read_buf(LOC1, loc1, 4) == 4)
196 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
197 LOC1, loc1, LOC2, loc2));
198 #if 0
199 if (memcmp(loc1, loc2, 4) != 0 )
201 /* It's 16k */
202 printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
203 eeprom.size = EEPROM_16KB;
204 success = 1;
206 else
207 #endif
209 /* Do step 2 check */
210 /* Invert value */
211 loc1[0] = ~loc1[0];
212 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
214 /* If 2k EEPROM this write will actually write 10 bytes
215 * from pos 0
217 D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
218 LOC1, loc1, LOC2, loc2));
219 if( eeprom_read_buf(LOC1, tmp, 4) == 4)
221 D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
222 LOC1, loc1, tmp));
223 if (memcmp(loc1, tmp, 4) != 0 )
225 printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
226 eeprom_name);
227 loc1[0] = ~loc1[0];
229 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
231 success = 1;
233 else
235 printk(KERN_INFO "%s: Restore 2k failed during probe,"
236 " EEPROM might be corrupt!\n", eeprom_name);
239 i2c_stop();
240 /* Go to 2k mode and write original data */
241 eeprom.size = EEPROM_2KB;
242 eeprom.select_cmd = 0xA0;
243 eeprom.sequential_write_pagesize = 16;
244 if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
247 else
249 printk(KERN_INFO "%s: Failed to write back 2k start!\n",
250 eeprom_name);
253 eeprom.size = EEPROM_2KB;
257 if(!success)
259 if( eeprom_read_buf(LOC2, loc2, 1) == 1)
261 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
262 LOC1, loc1, LOC2, loc2));
263 if (memcmp(loc1, loc2, 4) == 0 )
265 /* Data the same, must be mirrored -> 2k */
266 /* Restore data */
267 printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
268 loc1[0] = ~loc1[0];
269 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
271 success = 1;
273 else
275 printk(KERN_INFO "%s: Restore 2k failed during probe,"
276 " EEPROM might be corrupt!\n", eeprom_name);
280 eeprom.size = EEPROM_2KB;
282 else
284 printk(KERN_INFO "%s: 16k detected in step 2\n",
285 eeprom_name);
286 loc1[0] = ~loc1[0];
287 /* Data differs, assume 16k */
288 /* Restore data */
289 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
291 success = 1;
293 else
295 printk(KERN_INFO "%s: Restore 16k failed during probe,"
296 " EEPROM might be corrupt!\n", eeprom_name);
299 eeprom.size = EEPROM_16KB;
304 } /* read LOC1 */
305 } /* address LOC1 */
306 if (!success)
308 printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
309 eeprom.size = EEPROM_2KB;
311 } /* read */
314 else
316 i2c_outbyte(0x00);
317 if(!i2c_getack())
319 /* No 8k */
320 eeprom.size = EEPROM_2KB;
322 else
324 i2c_start();
325 i2c_outbyte(0x81);
326 if (!i2c_getack())
328 eeprom.size = EEPROM_2KB;
330 else
332 /* It's a 8kB */
333 i2c_inbyte();
334 eeprom.size = EEPROM_8KB;
338 i2c_stop();
339 #elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
340 eeprom.size = EEPROM_16KB;
341 #elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
342 eeprom.size = EEPROM_8KB;
343 #elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
344 eeprom.size = EEPROM_2KB;
345 #endif
347 switch(eeprom.size)
349 case (EEPROM_2KB):
350 printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
351 eeprom.sequential_write_pagesize = 16;
352 eeprom.select_cmd = 0xA0;
353 break;
354 case (EEPROM_8KB):
355 printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
356 eeprom.sequential_write_pagesize = 16;
357 eeprom.select_cmd = 0x80;
358 break;
359 case (EEPROM_16KB):
360 printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
361 eeprom.sequential_write_pagesize = 64;
362 eeprom.select_cmd = 0xA0;
363 break;
364 default:
365 eeprom.size = 0;
366 printk("%s: Did not find a supported eeprom\n", eeprom_name);
367 break;
372 eeprom_disable_write_protect();
374 return 0;
377 /* Opens the device. */
379 static int eeprom_open(struct inode * inode, struct file * file)
382 if(iminor(inode) != EEPROM_MINOR_NR)
383 return -ENXIO;
384 if(imajor(inode) != EEPROM_MAJOR_NR)
385 return -ENXIO;
387 if( eeprom.size > 0 )
389 /* OK */
390 return 0;
393 /* No EEprom found */
394 return -EFAULT;
397 /* Changes the current file position. */
399 static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
402 * orig 0: position from begning of eeprom
403 * orig 1: relative from current position
404 * orig 2: position from last eeprom address
407 switch (orig)
409 case 0:
410 file->f_pos = offset;
411 break;
412 case 1:
413 file->f_pos += offset;
414 break;
415 case 2:
416 file->f_pos = eeprom.size - offset;
417 break;
418 default:
419 return -EINVAL;
422 /* truncate position */
423 if (file->f_pos < 0)
425 file->f_pos = 0;
426 return(-EOVERFLOW);
429 if (file->f_pos >= eeprom.size)
431 file->f_pos = eeprom.size - 1;
432 return(-EOVERFLOW);
435 return ( file->f_pos );
438 /* Reads data from eeprom. */
440 static int eeprom_read_buf(loff_t addr, char * buf, int count)
442 struct file f;
444 f.f_pos = addr;
445 return eeprom_read(&f, buf, count, &addr);
450 /* Reads data from eeprom. */
452 static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
454 int read=0;
455 unsigned long p = file->f_pos;
457 unsigned char page;
459 if(p >= eeprom.size) /* Address i 0 - (size-1) */
461 return -EFAULT;
464 wait_event_interruptible(eeprom.wait_q, !eeprom.busy);
465 if (signal_pending(current))
466 return -EINTR;
468 eeprom.busy++;
470 page = (unsigned char) (p >> 8);
472 if(!eeprom_address(p))
474 printk(KERN_INFO "%s: Read failed to address the eeprom: "
475 "0x%08X (%i) page: %i\n", eeprom_name, (int)p, (int)p, page);
476 i2c_stop();
478 /* don't forget to wake them up */
479 eeprom.busy--;
480 wake_up_interruptible(&eeprom.wait_q);
481 return -EFAULT;
484 if( (p + count) > eeprom.size)
486 /* truncate count */
487 count = eeprom.size - p;
490 /* stop dummy write op and initiate the read op */
491 i2c_start();
493 /* special case for small eeproms */
494 if(eeprom.size < EEPROM_16KB)
496 i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
499 /* go on with the actual read */
500 read = read_from_eeprom( buf, count);
502 if(read > 0)
504 file->f_pos += read;
507 eeprom.busy--;
508 wake_up_interruptible(&eeprom.wait_q);
509 return read;
512 /* Writes data to eeprom. */
514 static int eeprom_write_buf(loff_t addr, const char * buf, int count)
516 struct file f;
518 f.f_pos = addr;
520 return eeprom_write(&f, buf, count, &addr);
524 /* Writes data to eeprom. */
526 static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
527 loff_t *off)
529 int i, written, restart=1;
530 unsigned long p;
532 if (!access_ok(VERIFY_READ, buf, count))
534 return -EFAULT;
537 wait_event_interruptible(eeprom.wait_q, !eeprom.busy);
538 /* bail out if we get interrupted */
539 if (signal_pending(current))
540 return -EINTR;
541 eeprom.busy++;
542 for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
544 restart = 0;
545 written = 0;
546 p = file->f_pos;
549 while( (written < count) && (p < eeprom.size))
551 /* address the eeprom */
552 if(!eeprom_address(p))
554 printk(KERN_INFO "%s: Write failed to address the eeprom: "
555 "0x%08X (%i) \n", eeprom_name, (int)p, (int)p);
556 i2c_stop();
558 /* don't forget to wake them up */
559 eeprom.busy--;
560 wake_up_interruptible(&eeprom.wait_q);
561 return -EFAULT;
563 #ifdef EEPROM_ADAPTIVE_TIMING
564 /* Adaptive algorithm to adjust timing */
565 if (eeprom.retry_cnt_addr > 0)
567 /* To Low now */
568 D(printk(">D=%i d=%i\n",
569 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
571 if (eeprom.usec_delay_step < 4)
573 eeprom.usec_delay_step++;
574 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
576 else
579 if (eeprom.adapt_state > 0)
581 /* To Low before */
582 eeprom.usec_delay_step *= 2;
583 if (eeprom.usec_delay_step > 2)
585 eeprom.usec_delay_step--;
587 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
589 else if (eeprom.adapt_state < 0)
591 /* To High before (toggle dir) */
592 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
593 if (eeprom.usec_delay_step > 1)
595 eeprom.usec_delay_step /= 2;
596 eeprom.usec_delay_step--;
601 eeprom.adapt_state = 1;
603 else
605 /* To High (or good) now */
606 D(printk("<D=%i d=%i\n",
607 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
609 if (eeprom.adapt_state < 0)
611 /* To High before */
612 if (eeprom.usec_delay_step > 1)
614 eeprom.usec_delay_step *= 2;
615 eeprom.usec_delay_step--;
617 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
619 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
623 else if (eeprom.adapt_state > 0)
625 /* To Low before (toggle dir) */
626 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
628 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
630 if (eeprom.usec_delay_step > 1)
632 eeprom.usec_delay_step /= 2;
633 eeprom.usec_delay_step--;
636 eeprom.adapt_state = -1;
639 if (eeprom.adapt_state > -100)
641 eeprom.adapt_state--;
643 else
645 /* Restart adaption */
646 D(printk("#Restart\n"));
647 eeprom.usec_delay_step++;
650 #endif /* EEPROM_ADAPTIVE_TIMING */
651 /* write until we hit a page boundary or count */
654 i2c_outbyte(buf[written]);
655 if(!i2c_getack())
657 restart=1;
658 printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
659 i2c_stop();
660 break;
662 written++;
663 p++;
664 } while( written < count && ( p % eeprom.sequential_write_pagesize ));
666 /* end write cycle */
667 i2c_stop();
668 i2c_delay(eeprom.usec_delay_writecycles);
669 } /* while */
670 } /* for */
672 eeprom.busy--;
673 wake_up_interruptible(&eeprom.wait_q);
674 if (written == 0 && file->f_pos >= eeprom.size){
675 return -ENOSPC;
677 file->f_pos += written;
678 return written;
681 /* Closes the device. */
683 static int eeprom_close(struct inode * inode, struct file * file)
685 /* do nothing for now */
686 return 0;
689 /* Sets the current address of the eeprom. */
691 static int eeprom_address(unsigned long addr)
693 int i;
694 unsigned char page, offset;
696 page = (unsigned char) (addr >> 8);
697 offset = (unsigned char) addr;
699 for(i = 0; i < EEPROM_RETRIES; i++)
701 /* start a dummy write for addressing */
702 i2c_start();
704 if(eeprom.size == EEPROM_16KB)
706 i2c_outbyte( eeprom.select_cmd );
707 i2c_getack();
708 i2c_outbyte(page);
710 else
712 i2c_outbyte( eeprom.select_cmd | (page << 1) );
714 if(!i2c_getack())
716 /* retry */
717 i2c_stop();
718 /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
719 i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
720 /* The chip needs up to 10 ms from write stop to next start */
723 else
725 i2c_outbyte(offset);
727 if(!i2c_getack())
729 /* retry */
730 i2c_stop();
732 else
733 break;
738 eeprom.retry_cnt_addr = i;
739 D(printk("%i\n", eeprom.retry_cnt_addr));
740 if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
742 /* failed */
743 return 0;
745 return 1;
748 /* Reads from current address. */
750 static int read_from_eeprom(char * buf, int count)
752 int i, read=0;
754 for(i = 0; i < EEPROM_RETRIES; i++)
756 if(eeprom.size == EEPROM_16KB)
758 i2c_outbyte( eeprom.select_cmd | 1 );
761 if(i2c_getack())
763 break;
767 if(i == EEPROM_RETRIES)
769 printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
770 i2c_stop();
772 return -EFAULT;
775 while( (read < count))
777 if (put_user(i2c_inbyte(), &buf[read++]))
779 i2c_stop();
781 return -EFAULT;
785 * make sure we don't ack last byte or you will get very strange
786 * results!
788 if(read < count)
790 i2c_sendack();
794 /* stop the operation */
795 i2c_stop();
797 return read;
800 /* Disables write protection if applicable. */
802 #define DBP_SAVE(x)
803 #define ax_printf printk
804 static void eeprom_disable_write_protect(void)
806 /* Disable write protect */
807 if (eeprom.size == EEPROM_8KB)
809 /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
810 i2c_start();
811 i2c_outbyte(0xbe);
812 if(!i2c_getack())
814 DBP_SAVE(ax_printf("Get ack returns false\n"));
816 i2c_outbyte(0xFF);
817 if(!i2c_getack())
819 DBP_SAVE(ax_printf("Get ack returns false 2\n"));
821 i2c_outbyte(0x02);
822 if(!i2c_getack())
824 DBP_SAVE(ax_printf("Get ack returns false 3\n"));
826 i2c_stop();
828 i2c_delay(1000);
830 /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
831 i2c_start();
832 i2c_outbyte(0xbe);
833 if(!i2c_getack())
835 DBP_SAVE(ax_printf("Get ack returns false 55\n"));
837 i2c_outbyte(0xFF);
838 if(!i2c_getack())
840 DBP_SAVE(ax_printf("Get ack returns false 52\n"));
842 i2c_outbyte(0x06);
843 if(!i2c_getack())
845 DBP_SAVE(ax_printf("Get ack returns false 53\n"));
847 i2c_stop();
849 /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
850 i2c_start();
851 i2c_outbyte(0xbe);
852 if(!i2c_getack())
854 DBP_SAVE(ax_printf("Get ack returns false 56\n"));
856 i2c_outbyte(0xFF);
857 if(!i2c_getack())
859 DBP_SAVE(ax_printf("Get ack returns false 57\n"));
861 i2c_outbyte(0x06);
862 if(!i2c_getack())
864 DBP_SAVE(ax_printf("Get ack returns false 58\n"));
866 i2c_stop();
868 /* Write protect disabled */
872 module_init(eeprom_init);