arch/blackfin/mach-bf537/boards/minotaur.c

   1 /*
   2  */
   3
   4 #include <linux/device.h>
   5 #include <linux/platform_device.h>
   6 #include <linux/mtd/mtd.h>
   7 #include <linux/mtd/partitions.h>
   8 #include <linux/spi/spi.h>
   9 #include <linux/spi/flash.h>
  10 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  11 #include <linux/usb_isp1362.h>
  12 #endif
  13 #include <linux/ata_platform.h>
  14 #include <linux/irq.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/usb_sl811.h>
  17 #include <asm/dma.h>
  18 #include <asm/bfin5xx_spi.h>
  19 #include <asm/reboot.h>
  20 #include <linux/spi/ad7877.h>
  21
  22 /*
  23  * Name the Board for the /proc/cpuinfo
  24  */
  25 char *bfin_board_name = "CamSig Minotaur BF537";
  26
  27 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  28 static struct resource bfin_pcmcia_cf_resources[] = {
  29         {
  30                 .start = 0x20310000, /* IO PORT */
  31                 .end = 0x20312000,
  32                 .flags = IORESOURCE_MEM,
  33         }, {
  34                 .start = 0x20311000, /* Attribute Memory */
  35                 .end = 0x20311FFF,
  36                 .flags = IORESOURCE_MEM,
  37         }, {
  38                 .start = IRQ_PF4,
  39                 .end = IRQ_PF4,
  40                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  41         }, {
  42                 .start = IRQ_PF6, /* Card Detect PF6 */
  43                 .end = IRQ_PF6,
  44                 .flags = IORESOURCE_IRQ,
  45         },
  46 };
  47
  48 static struct platform_device bfin_pcmcia_cf_device = {
  49         .name = "bfin_cf_pcmcia",
  50         .id = -1,
  51         .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  52         .resource = bfin_pcmcia_cf_resources,
  53 };
  54 #endif
  55
  56 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  57 static struct platform_device rtc_device = {
  58         .name = "rtc-bfin",
  59         .id   = -1,
  60 };
  61 #endif
  62
  63 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  64 static struct platform_device bfin_mac_device = {
  65         .name = "bfin_mac",
  66 };
  67 #endif
  68
  69 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  70 static struct resource net2272_bfin_resources[] = {
  71         {
  72                 .start = 0x20300000,
  73                 .end = 0x20300000 + 0x100,
  74                 .flags = IORESOURCE_MEM,
  75         }, {
  76                 .start = IRQ_PF7,
  77                 .end = IRQ_PF7,
  78                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  79         },
  80 };
  81
  82 static struct platform_device net2272_bfin_device = {
  83         .name = "net2272",
  84         .id = -1,
  85         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  86         .resource = net2272_bfin_resources,
  87 };
  88 #endif
  89
  90 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  91 /* all SPI peripherals info goes here */
  92
  93 #if defined(CONFIG_MTD_M25P80) \
  94         || defined(CONFIG_MTD_M25P80_MODULE)
  95
  96 /* Partition sizes */
  97 #define FLASH_SIZE       0x00400000
  98 #define PSIZE_UBOOT      0x00030000
  99 #define PSIZE_INITRAMFS  0x00240000
 100
 101 static struct mtd_partition bfin_spi_flash_partitions[] = {
 102         {
 103                 .name       = "uboot",
 104                 .size       = PSIZE_UBOOT,
 105                 .offset     = 0x000000,
 106                 .mask_flags = MTD_CAP_ROM
 107         }, {
 108                 .name       = "initramfs",
 109                 .size       = PSIZE_INITRAMFS,
 110                 .offset     = PSIZE_UBOOT
 111         }, {
 112                 .name       = "opt",
 113                 .size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
 114                 .offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
 115         }
 116 };
 117
 118 static struct flash_platform_data bfin_spi_flash_data = {
 119         .name = "m25p80",
 120         .parts = bfin_spi_flash_partitions,
 121         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 122         .type = "m25p64",
 123 };
 124
 125 /* SPI flash chip (m25p64) */
 126 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 127         .enable_dma = 0,         /* use dma transfer with this chip*/
 128         .bits_per_word = 8,
 129 };
 130 #endif
 131
 132 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 133 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 134         .enable_dma = 1,
 135         .bits_per_word = 8,
 136 };
 137 #endif
 138
 139 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 140 #if defined(CONFIG_MTD_M25P80) \
 141         || defined(CONFIG_MTD_M25P80_MODULE)
 142         {
 143                 /* the modalias must be the same as spi device driver name */
 144                 .modalias = "m25p80", /* Name of spi_driver for this device */
 145                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 146                 .bus_num = 0, /* Framework bus number */
 147                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 148                 .platform_data = &bfin_spi_flash_data,
 149                 .controller_data = &spi_flash_chip_info,
 150                 .mode = SPI_MODE_3,
 151         },
 152 #endif
 153
 154 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 155         {
 156                 .modalias = "spi_mmc_dummy",
 157                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 158                 .bus_num = 0,
 159                 .chip_select = 0,
 160                 .platform_data = NULL,
 161                 .controller_data = &spi_mmc_chip_info,
 162                 .mode = SPI_MODE_3,
 163         },
 164         {
 165                 .modalias = "spi_mmc",
 166                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 167                 .bus_num = 0,
 168                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 169                 .platform_data = NULL,
 170                 .controller_data = &spi_mmc_chip_info,
 171                 .mode = SPI_MODE_3,
 172         },
 173 #endif
 174 };
 175
 176 /* SPI controller data */
 177 static struct bfin5xx_spi_master bfin_spi0_info = {
 178         .num_chipselect = 8,
 179         .enable_dma = 1,  /* master has the ability to do dma transfer */
 180 };
 181
 182 /* SPI (0) */
 183 static struct resource bfin_spi0_resource[] = {
 184         [0] = {
 185                 .start = SPI0_REGBASE,
 186                 .end   = SPI0_REGBASE + 0xFF,
 187                 .flags = IORESOURCE_MEM,
 188                 },
 189         [1] = {
 190                 .start = CH_SPI,
 191                 .end   = CH_SPI,
 192                 .flags = IORESOURCE_IRQ,
 193         },
 194 };
 195
 196 static struct platform_device bfin_spi0_device = {
 197         .name = "bfin-spi",
 198         .id = 0, /* Bus number */
 199         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 200         .resource = bfin_spi0_resource,
 201         .dev = {
 202                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 203         },
 204 };
 205 #endif  /* spi master and devices */
 206
 207 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 208 static struct resource bfin_uart_resources[] = {
 209         {
 210                 .start = 0xFFC00400,
 211                 .end = 0xFFC004FF,
 212                 .flags = IORESOURCE_MEM,
 213         }, {
 214                 .start = 0xFFC02000,
 215                 .end = 0xFFC020FF,
 216                 .flags = IORESOURCE_MEM,
 217         },
 218 };
 219
 220 static struct platform_device bfin_uart_device = {
 221         .name = "bfin-uart",
 222         .id = 1,
 223         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 224         .resource = bfin_uart_resources,
 225 };
 226 #endif
 227
 228 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 229 static struct resource bfin_twi0_resource[] = {
 230         [0] = {
 231                 .start = TWI0_REGBASE,
 232                 .end   = TWI0_REGBASE + 0xFF,
 233                 .flags = IORESOURCE_MEM,
 234         },
 235         [1] = {
 236                 .start = IRQ_TWI,
 237                 .end   = IRQ_TWI,
 238                 .flags = IORESOURCE_IRQ,
 239         },
 240 };
 241
 242 static struct platform_device i2c_bfin_twi_device = {
 243         .name = "i2c-bfin-twi",
 244         .id = 0,
 245         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 246         .resource = bfin_twi0_resource,
 247 };
 248 #endif
 249
 250 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 251 static struct platform_device bfin_sport0_uart_device = {
 252         .name = "bfin-sport-uart",
 253         .id = 0,
 254 };
 255
 256 static struct platform_device bfin_sport1_uart_device = {
 257         .name = "bfin-sport-uart",
 258         .id = 1,
 259 };
 260 #endif
 261
 262 static struct platform_device *minotaur_devices[] __initdata = {
 263 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 264         &bfin_pcmcia_cf_device,
 265 #endif
 266
 267 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 268         &rtc_device,
 269 #endif
 270
 271 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 272         &bfin_mac_device,
 273 #endif
 274
 275 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 276         &net2272_bfin_device,
 277 #endif
 278
 279 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 280         &bfin_spi0_device,
 281 #endif
 282
 283 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 284         &bfin_uart_device,
 285 #endif
 286
 287 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 288         &i2c_bfin_twi_device,
 289 #endif
 290
 291 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 292         &bfin_sport0_uart_device,
 293         &bfin_sport1_uart_device,
 294 #endif
 295
 296 };
 297
 298 static int __init minotaur_init(void)
 299 {
 300         printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
 301         platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
 302 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 303         spi_register_board_info(bfin_spi_board_info,
 304                                 ARRAY_SIZE(bfin_spi_board_info));
 305 #endif
 306
 307         return 0;
 308 }
 309
 310 arch_initcall(minotaur_init);
 311
 312 void native_machine_restart(char *cmd)
 313 {
 314         /* workaround reboot hang when booting from SPI */
 315         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 316                 bfin_gpio_reset_spi0_ssel1();
 317 }