Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / arm / mach-s3c2410 / gpio.c
blob01e795d1146eec85691ff1d1f41495e94108a5bf
1 /* linux/arch/arm/mach-s3c2410/gpio.c
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 GPIO support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/interrupt.h>
27 #include <linux/ioport.h>
29 #include <asm/hardware.h>
30 #include <asm/irq.h>
31 #include <asm/io.h>
33 #include <asm/arch/regs-gpio.h>
35 int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
36 unsigned int config)
38 void __iomem *reg = S3C24XX_EINFLT0;
39 unsigned long flags;
40 unsigned long val;
42 if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15)
43 return -1;
45 config &= 0xff;
47 pin -= S3C2410_GPG8;
48 reg += pin & ~3;
50 local_irq_save(flags);
52 /* update filter width and clock source */
54 val = __raw_readl(reg);
55 val &= ~(0xff << ((pin & 3) * 8));
56 val |= config << ((pin & 3) * 8);
57 __raw_writel(val, reg);
59 /* update filter enable */
61 val = __raw_readl(S3C24XX_EXTINT2);
62 val &= ~(1 << ((pin * 4) + 3));
63 val |= on << ((pin * 4) + 3);
64 __raw_writel(val, S3C24XX_EXTINT2);
66 local_irq_restore(flags);
68 return 0;
71 EXPORT_SYMBOL(s3c2410_gpio_irqfilter);