Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / arm / mach-pxa / cm-x270.c
blobecdbc96a4de1240f026c6b7c813409faf1073911
1 /*
2 * linux/arch/arm/mach-pxa/cm-x270.c
4 * Copyright (C) 2007 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/types.h>
13 #include <linux/pm.h>
14 #include <linux/fb.h>
15 #include <linux/platform_device.h>
16 #include <linux/irq.h>
17 #include <linux/sysdev.h>
18 #include <linux/io.h>
19 #include <linux/delay.h>
21 #include <linux/dm9000.h>
22 #include <linux/rtc-v3020.h>
23 #include <linux/serial_8250.h>
25 #include <video/mbxfb.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/map.h>
31 #include <asm/arch/pxa-regs.h>
32 #include <asm/arch/pxa2xx-regs.h>
33 #include <asm/arch/pxafb.h>
34 #include <asm/arch/ohci.h>
35 #include <asm/arch/mmc.h>
36 #include <asm/arch/bitfield.h>
37 #include <asm/arch/cm-x270.h>
39 #include <asm/hardware/it8152.h>
41 #include "generic.h"
42 #include "cm-x270-pci.h"
44 #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
45 #define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
47 static struct resource cmx270_dm9k_resource[] = {
48 [0] = {
49 .start = DM9000_PHYS_BASE,
50 .end = DM9000_PHYS_BASE + 4,
51 .flags = IORESOURCE_MEM,
53 [1] = {
54 .start = DM9000_PHYS_BASE + 8,
55 .end = DM9000_PHYS_BASE + 8 + 500,
56 .flags = IORESOURCE_MEM,
58 [2] = {
59 .start = CMX270_ETHIRQ,
60 .end = CMX270_ETHIRQ,
61 .flags = IORESOURCE_IRQ,
65 /* for the moment we limit ourselves to 32bit IO until some
66 * better IO routines can be written and tested
68 static struct dm9000_plat_data cmx270_dm9k_platdata = {
69 .flags = DM9000_PLATF_32BITONLY,
72 /* Ethernet device */
73 static struct platform_device cmx270_device_dm9k = {
74 .name = "dm9000",
75 .id = 0,
76 .num_resources = ARRAY_SIZE(cmx270_dm9k_resource),
77 .resource = cmx270_dm9k_resource,
78 .dev = {
79 .platform_data = &cmx270_dm9k_platdata,
83 /* audio device */
84 static struct platform_device cmx270_audio_device = {
85 .name = "pxa2xx-ac97",
86 .id = -1,
89 /* touchscreen controller */
90 static struct platform_device cmx270_ts_device = {
91 .name = "ucb1400_ts",
92 .id = -1,
95 /* RTC */
96 static struct resource cmx270_v3020_resource[] = {
97 [0] = {
98 .start = RTC_PHYS_BASE,
99 .end = RTC_PHYS_BASE + 4,
100 .flags = IORESOURCE_MEM,
104 struct v3020_platform_data cmx270_v3020_pdata = {
105 .leftshift = 16,
108 static struct platform_device cmx270_rtc_device = {
109 .name = "v3020",
110 .num_resources = ARRAY_SIZE(cmx270_v3020_resource),
111 .resource = cmx270_v3020_resource,
112 .id = -1,
113 .dev = {
114 .platform_data = &cmx270_v3020_pdata,
119 * CM-X270 LEDs
121 static struct platform_device cmx270_led_device = {
122 .name = "cm-x270-led",
123 .id = -1,
126 /* 2700G graphics */
127 static u64 fb_dma_mask = ~(u64)0;
129 static struct resource cmx270_2700G_resource[] = {
130 /* frame buffer memory including ODFB and External SDRAM */
131 [0] = {
132 .start = MARATHON_PHYS,
133 .end = MARATHON_PHYS + 0x02000000,
134 .flags = IORESOURCE_MEM,
136 /* Marathon registers */
137 [1] = {
138 .start = MARATHON_PHYS + 0x03fe0000,
139 .end = MARATHON_PHYS + 0x03ffffff,
140 .flags = IORESOURCE_MEM,
144 static unsigned long save_lcd_regs[10];
146 static int cmx270_marathon_probe(struct fb_info *fb)
148 /* save PXA-270 pin settings before enabling 2700G */
149 save_lcd_regs[0] = GPDR1;
150 save_lcd_regs[1] = GPDR2;
151 save_lcd_regs[2] = GAFR1_U;
152 save_lcd_regs[3] = GAFR2_L;
153 save_lcd_regs[4] = GAFR2_U;
155 /* Disable PXA-270 on-chip controller driving pins */
156 GPDR1 &= ~(0xfc000000);
157 GPDR2 &= ~(0x00c03fff);
158 GAFR1_U &= ~(0xfff00000);
159 GAFR2_L &= ~(0x0fffffff);
160 GAFR2_U &= ~(0x0000f000);
161 return 0;
164 static int cmx270_marathon_remove(struct fb_info *fb)
166 GPDR1 = save_lcd_regs[0];
167 GPDR2 = save_lcd_regs[1];
168 GAFR1_U = save_lcd_regs[2];
169 GAFR2_L = save_lcd_regs[3];
170 GAFR2_U = save_lcd_regs[4];
171 return 0;
174 static struct mbxfb_platform_data cmx270_2700G_data = {
175 .xres = {
176 .min = 240,
177 .max = 1200,
178 .defval = 640,
180 .yres = {
181 .min = 240,
182 .max = 1200,
183 .defval = 480,
185 .bpp = {
186 .min = 16,
187 .max = 32,
188 .defval = 16,
190 .memsize = 8*1024*1024,
191 .probe = cmx270_marathon_probe,
192 .remove = cmx270_marathon_remove,
195 static struct platform_device cmx270_2700G = {
196 .name = "mbx-fb",
197 .dev = {
198 .platform_data = &cmx270_2700G_data,
199 .dma_mask = &fb_dma_mask,
200 .coherent_dma_mask = 0xffffffff,
202 .num_resources = ARRAY_SIZE(cmx270_2700G_resource),
203 .resource = cmx270_2700G_resource,
204 .id = -1,
207 static u64 ata_dma_mask = ~(u64)0;
209 static struct platform_device cmx270_ata = {
210 .name = "pata_cm_x270",
211 .id = -1,
212 .dev = {
213 .dma_mask = &ata_dma_mask,
214 .coherent_dma_mask = 0xffffffff,
218 /* platform devices */
219 static struct platform_device *platform_devices[] __initdata = {
220 &cmx270_device_dm9k,
221 &cmx270_audio_device,
222 &cmx270_rtc_device,
223 &cmx270_2700G,
224 &cmx270_led_device,
225 &cmx270_ts_device,
226 &cmx270_ata,
229 /* Map PCI companion and IDE/General Purpose CS statically */
230 static struct map_desc cmx270_io_desc[] __initdata = {
231 [0] = { /* IDE/general purpose space */
232 .virtual = CMX270_IDE104_VIRT,
233 .pfn = __phys_to_pfn(CMX270_IDE104_PHYS),
234 .length = SZ_64M - SZ_8M,
235 .type = MT_DEVICE
237 [1] = { /* PCI bridge */
238 .virtual = CMX270_IT8152_VIRT,
239 .pfn = __phys_to_pfn(CMX270_IT8152_PHYS),
240 .length = SZ_64M,
241 .type = MT_DEVICE
246 Display definitions
247 keep these for backwards compatibility, although symbolic names (as
248 e.g. in lpd270.c) looks better
250 #define MTYPE_STN320x240 0
251 #define MTYPE_TFT640x480 1
252 #define MTYPE_CRT640x480 2
253 #define MTYPE_CRT800x600 3
254 #define MTYPE_TFT320x240 6
255 #define MTYPE_STN640x480 7
257 static struct pxafb_mode_info generic_stn_320x240_mode = {
258 .pixclock = 76923,
259 .bpp = 8,
260 .xres = 320,
261 .yres = 240,
262 .hsync_len = 3,
263 .vsync_len = 2,
264 .left_margin = 3,
265 .upper_margin = 0,
266 .right_margin = 3,
267 .lower_margin = 0,
268 .sync = (FB_SYNC_HOR_HIGH_ACT |
269 FB_SYNC_VERT_HIGH_ACT),
270 .cmap_greyscale = 0,
273 static struct pxafb_mach_info generic_stn_320x240 = {
274 .modes = &generic_stn_320x240_mode,
275 .num_modes = 1,
276 .lccr0 = 0,
277 .lccr3 = (LCCR3_PixClkDiv(0x03) |
278 LCCR3_Acb(0xff) |
279 LCCR3_PCP),
280 .cmap_inverse = 0,
281 .cmap_static = 0,
284 static struct pxafb_mode_info generic_tft_640x480_mode = {
285 .pixclock = 38461,
286 .bpp = 8,
287 .xres = 640,
288 .yres = 480,
289 .hsync_len = 60,
290 .vsync_len = 2,
291 .left_margin = 70,
292 .upper_margin = 10,
293 .right_margin = 70,
294 .lower_margin = 5,
295 .sync = 0,
296 .cmap_greyscale = 0,
299 static struct pxafb_mach_info generic_tft_640x480 = {
300 .modes = &generic_tft_640x480_mode,
301 .num_modes = 1,
302 .lccr0 = (LCCR0_PAS),
303 .lccr3 = (LCCR3_PixClkDiv(0x01) |
304 LCCR3_Acb(0xff) |
305 LCCR3_PCP),
306 .cmap_inverse = 0,
307 .cmap_static = 0,
310 static struct pxafb_mode_info generic_crt_640x480_mode = {
311 .pixclock = 38461,
312 .bpp = 8,
313 .xres = 640,
314 .yres = 480,
315 .hsync_len = 63,
316 .vsync_len = 2,
317 .left_margin = 81,
318 .upper_margin = 33,
319 .right_margin = 16,
320 .lower_margin = 10,
321 .sync = (FB_SYNC_HOR_HIGH_ACT |
322 FB_SYNC_VERT_HIGH_ACT),
323 .cmap_greyscale = 0,
326 static struct pxafb_mach_info generic_crt_640x480 = {
327 .modes = &generic_crt_640x480_mode,
328 .num_modes = 1,
329 .lccr0 = (LCCR0_PAS),
330 .lccr3 = (LCCR3_PixClkDiv(0x01) |
331 LCCR3_Acb(0xff)),
332 .cmap_inverse = 0,
333 .cmap_static = 0,
336 static struct pxafb_mode_info generic_crt_800x600_mode = {
337 .pixclock = 28846,
338 .bpp = 8,
339 .xres = 800,
340 .yres = 600,
341 .hsync_len = 63,
342 .vsync_len = 2,
343 .left_margin = 26,
344 .upper_margin = 21,
345 .right_margin = 26,
346 .lower_margin = 11,
347 .sync = (FB_SYNC_HOR_HIGH_ACT |
348 FB_SYNC_VERT_HIGH_ACT),
349 .cmap_greyscale = 0,
352 static struct pxafb_mach_info generic_crt_800x600 = {
353 .modes = &generic_crt_800x600_mode,
354 .num_modes = 1,
355 .lccr0 = (LCCR0_PAS),
356 .lccr3 = (LCCR3_PixClkDiv(0x02) |
357 LCCR3_Acb(0xff)),
358 .cmap_inverse = 0,
359 .cmap_static = 0,
362 static struct pxafb_mode_info generic_tft_320x240_mode = {
363 .pixclock = 134615,
364 .bpp = 16,
365 .xres = 320,
366 .yres = 240,
367 .hsync_len = 63,
368 .vsync_len = 7,
369 .left_margin = 75,
370 .upper_margin = 0,
371 .right_margin = 15,
372 .lower_margin = 15,
373 .sync = 0,
374 .cmap_greyscale = 0,
377 static struct pxafb_mach_info generic_tft_320x240 = {
378 .modes = &generic_tft_320x240_mode,
379 .num_modes = 1,
380 .lccr0 = (LCCR0_PAS),
381 .lccr3 = (LCCR3_PixClkDiv(0x06) |
382 LCCR3_Acb(0xff) |
383 LCCR3_PCP),
384 .cmap_inverse = 0,
385 .cmap_static = 0,
388 static struct pxafb_mode_info generic_stn_640x480_mode = {
389 .pixclock = 57692,
390 .bpp = 8,
391 .xres = 640,
392 .yres = 480,
393 .hsync_len = 4,
394 .vsync_len = 2,
395 .left_margin = 10,
396 .upper_margin = 5,
397 .right_margin = 10,
398 .lower_margin = 5,
399 .sync = (FB_SYNC_HOR_HIGH_ACT |
400 FB_SYNC_VERT_HIGH_ACT),
401 .cmap_greyscale = 0,
404 static struct pxafb_mach_info generic_stn_640x480 = {
405 .modes = &generic_stn_640x480_mode,
406 .num_modes = 1,
407 .lccr0 = 0,
408 .lccr3 = (LCCR3_PixClkDiv(0x02) |
409 LCCR3_Acb(0xff)),
410 .cmap_inverse = 0,
411 .cmap_static = 0,
414 static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
416 static int __init cmx270_set_display(char *str)
418 int disp_type = simple_strtol(str, NULL, 0);
419 switch (disp_type) {
420 case MTYPE_STN320x240:
421 cmx270_display = &generic_stn_320x240;
422 break;
423 case MTYPE_TFT640x480:
424 cmx270_display = &generic_tft_640x480;
425 break;
426 case MTYPE_CRT640x480:
427 cmx270_display = &generic_crt_640x480;
428 break;
429 case MTYPE_CRT800x600:
430 cmx270_display = &generic_crt_800x600;
431 break;
432 case MTYPE_TFT320x240:
433 cmx270_display = &generic_tft_320x240;
434 break;
435 case MTYPE_STN640x480:
436 cmx270_display = &generic_stn_640x480;
437 break;
438 default: /* fallback to CRT 640x480 */
439 cmx270_display = &generic_crt_640x480;
440 break;
442 return 1;
446 This should be done really early to get proper configuration for
447 frame buffer.
448 Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
449 has limitied line length for kernel command line, and also it will
450 break compatibitlty with proprietary releases already in field.
452 __setup("monitor=", cmx270_set_display);
454 /* PXA27x OHCI controller setup */
455 static int cmx270_ohci_init(struct device *dev)
457 /* Set the Power Control Polarity Low */
458 UHCHR = (UHCHR | UHCHR_PCPL) &
459 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
461 return 0;
464 static struct pxaohci_platform_data cmx270_ohci_platform_data = {
465 .port_mode = PMM_PERPORT_MODE,
466 .init = cmx270_ohci_init,
470 static int cmx270_mci_init(struct device *dev,
471 irq_handler_t cmx270_detect_int,
472 void *data)
474 int err;
477 * setup GPIO for PXA27x MMC controller
479 pxa_gpio_mode(GPIO32_MMCCLK_MD);
480 pxa_gpio_mode(GPIO112_MMCCMD_MD);
481 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
482 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
483 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
484 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
486 /* SB-X270 uses GPIO105 as SD power enable */
487 pxa_gpio_mode(105 | GPIO_OUT);
489 /* card detect IRQ on GPIO 83 */
490 pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
492 err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
493 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
494 "MMC card detect", data);
495 if (err)
496 printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
497 " request MMC card detect IRQ\n");
499 return err;
502 static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
504 struct pxamci_platform_data *p_d = dev->platform_data;
506 if ((1 << vdd) & p_d->ocr_mask) {
507 printk(KERN_DEBUG "%s: on\n", __func__);
508 GPCR(105) = GPIO_bit(105);
509 } else {
510 GPSR(105) = GPIO_bit(105);
511 printk(KERN_DEBUG "%s: off\n", __func__);
515 static void cmx270_mci_exit(struct device *dev, void *data)
517 free_irq(CMX270_MMC_IRQ, data);
520 static struct pxamci_platform_data cmx270_mci_platform_data = {
521 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
522 .init = cmx270_mci_init,
523 .setpower = cmx270_mci_setpower,
524 .exit = cmx270_mci_exit,
527 #ifdef CONFIG_PM
528 static unsigned long sleep_save_msc[10];
530 static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
532 cmx270_pci_suspend();
534 /* save MSC registers */
535 sleep_save_msc[0] = MSC0;
536 sleep_save_msc[1] = MSC1;
537 sleep_save_msc[2] = MSC2;
539 /* setup power saving mode registers */
540 PCFR = 0x0;
541 PSLR = 0xff400000;
542 PMCR = 0x00000005;
543 PWER = 0x80000000;
544 PFER = 0x00000000;
545 PRER = 0x00000000;
546 PGSR0 = 0xC0018800;
547 PGSR1 = 0x004F0002;
548 PGSR2 = 0x6021C000;
549 PGSR3 = 0x00020000;
551 return 0;
554 static int cmx270_resume(struct sys_device *dev)
556 cmx270_pci_resume();
558 /* restore MSC registers */
559 MSC0 = sleep_save_msc[0];
560 MSC1 = sleep_save_msc[1];
561 MSC2 = sleep_save_msc[2];
563 return 0;
566 static struct sysdev_class cmx270_pm_sysclass = {
567 .name = "pm",
568 .resume = cmx270_resume,
569 .suspend = cmx270_suspend,
572 static struct sys_device cmx270_pm_device = {
573 .cls = &cmx270_pm_sysclass,
576 static int __init cmx270_pm_init(void)
578 int error;
579 error = sysdev_class_register(&cmx270_pm_sysclass);
580 if (error == 0)
581 error = sysdev_register(&cmx270_pm_device);
582 return error;
584 #else
585 static int __init cmx270_pm_init(void) { return 0; }
586 #endif
588 static void __init cmx270_init(void)
590 cmx270_pm_init();
592 set_pxa_fb_info(cmx270_display);
594 /* register CM-X270 platform devices */
595 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
597 /* set MCI and OHCI platform parameters */
598 pxa_set_mci_info(&cmx270_mci_platform_data);
599 pxa_set_ohci_info(&cmx270_ohci_platform_data);
601 /* This enables the STUART */
602 pxa_gpio_mode(GPIO46_STRXD_MD);
603 pxa_gpio_mode(GPIO47_STTXD_MD);
605 /* This enables the BTUART */
606 pxa_gpio_mode(GPIO42_BTRXD_MD);
607 pxa_gpio_mode(GPIO43_BTTXD_MD);
608 pxa_gpio_mode(GPIO44_BTCTS_MD);
609 pxa_gpio_mode(GPIO45_BTRTS_MD);
612 static void __init cmx270_init_irq(void)
614 pxa27x_init_irq();
617 cmx270_pci_init_irq();
619 /* Setup interrupt for dm9000 */
620 pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
621 set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
623 /* Setup interrupt for 2700G */
624 pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
625 set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
628 static void __init cmx270_map_io(void)
630 pxa_map_io();
631 iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
635 MACHINE_START(ARMCORE, "Compulab CM-x270")
636 .boot_params = 0xa0000100,
637 .phys_io = 0x40000000,
638 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
639 .map_io = cmx270_map_io,
640 .init_irq = cmx270_init_irq,
641 .timer = &pxa_timer,
642 .init_machine = cmx270_init,
643 MACHINE_END