apps/include/pci.h

   1 /*
   2     meinOS - A unix-like x86 microkernel operating system
   3     Copyright (C) 2008  Janosch Gräf <janosch.graef@gmx.net>
   4
   5     This program is free software: you can redistribute it and/or modify
   6     it under the terms of the GNU Lesser General Public License as published by
   7     the Free Software Foundation, either version 3 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU Lesser General Public License for more details.
  14
  15     You should have received a copy of the GNU Lesser General Public License
  16     along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19 #ifndef _LIBMEINOS_PCI_H_
  20 #define _LIBMEINOS_PCI_H_
  21
  22 #include <sys/types.h>
  23 #include <stdint.h>
  24
  25 #define PCI_MAXBUSSES 256
  26 #define PCI_MAXSLOTS  32
  27 #define PCI_MAXFUNCS  8
  28
  29 #define PCI_VENDOR_NONE         0xFFFF
  30 #define PCI_VENDOR_MICROSOFT    0x045E
  31 #define PCI_VENDOR_ATI          0x1002
  32 #define PCI_VENDOR_IBM          0x1014
  33 #define PCI_VENDOR_HP           0x103C
  34 #define PCI_VENDOR_SONY         0x104D
  35 #define PCI_VENDOR_SUN          0x108E
  36 #define PCI_VENDOR_PACKARDBELL  0x109A
  37 #define PCI_VENDOR_NVIDIA       0x10DE
  38 #define PCI_VENDOR_REALTEK      0x10EC
  39 #define PCI_VENDOR_CREATIVELABS 0x1102
  40 #define PCI_VENDOR_ATMEL        0x1114
  41 #define PCI_VENDOR_INTEL        0x8086
  42 // for more vendors see http://pci-ids.ucw.cz/iii//?p=%2A or /etc/pci.ids
  43
  44 #define PCI_CLASSCODE_PRE2        0x00
  45 #define PCI_CLASSCODE_MASSSTORAGE 0x01
  46 #define PCI_CLASSCODE_NETWORK     0x02
  47 #define PCI_CLASSCODE_DISPLAY     0x03
  48 #define PCI_CLASSCODE_MULTIMEDIA  0x04
  49 #define PCI_CLASSCODE_MEMORY      0x05
  50 #define PCI_CLASSCODE_BRIDGE      0x06
  51 #define PCI_CLASSCODE_SIMPLECOM   0x07
  52 #define PCI_CLASSCODE_BASESYSPER  0x08
  53 #define PCI_CLASSCODE_INPUT       0x09
  54 #define PCI_CLASSCODE_DOCKING     0x0A
  55 #define PCI_CLASSCODE_PROCESSORS  0x0B
  56 #define PCI_CLASSCODE_SERIALBUS   0x0C
  57 #define PCI_CLASSCODE_NONE        0xFE // is that allowed?
  58 #define PCI_CLASSCODE_MISC        0xFF
  59
  60 #define PCI_SUBCLASS_NONE               0xFF // is that allowed?
  61 // Pre 2.0
  62 #define PCI_SUBCLASS_PRE2_OTHERS        0x00
  63 #define PCI_SUBCLASS_PRE2_VGA           0x01
  64 // Mass Storage
  65 #define PCI_SUBCLASS_MASSSTORAGE_SCSI   0x00
  66 #define PCI_SUBCLASS_MASSSTORAGE_IDE    0x01
  67 #define PCI_SUBCLASS_MASSSTORAGE_FLOPPY 0x02
  68 #define PCI_SUBCLASS_MASSSTORAGE_IPI    0x02
  69 #define PCI_SUBCLASS_MASSSTORAGE_RAID   0x04
  70 #define PCI_SUBCLASS_MASSSTORAGE_OTHERS 0x80
  71 // Network
  72 #define PCI_SUBCLASS_NETWORK_ETHERNET   0x00
  73 #define PCI_SUBCLASS_NETWORK_TOKENRING  0x01
  74 #define PCI_SUBCLASS_NETWORK_FDDI       0x02
  75 #define PCI_SUBCLASS_NETWORK_ATM        0x03
  76 #define PCI_SUBCLASS_NETWORK_OTHERS     0x80
  77 // Display
  78 #define PCI_SUBCLASS_DISPLAY_VGA        0x00
  79 #define PCI_SUBCLASS_DISPLAY_XGA        0x01
  80 #define PCI_SUBCLASS_DISPLAY_OTHERS     0x80
  81 // Multimedia
  82 #define PCI_SUBCLASS_MULTIMEDIA_VIDEO   0x00
  83 #define PCI_SUBCLASS_MULTIMEDIA_AUDIO   0x01
  84 #define PCI_SUBCLASS_MULTIMEDIA_OTHERS  0x80
  85 // Memory
  86 #define PCI_SUBCLASS_MEMORY_RAM         0x00
  87 #define PCI_SUBCLASS_MEMORY_FLASH       0x01
  88 #define PCI_SUBCLASS_MEMORY_OTHERS      0x80
  89 // Bridge
  90 #define PCI_SUBCLASS_BRIDGE_HOST_PCI    0x00
  91 #define PCI_SUBCLASS_BRIDGE_PCI_ISA     0x01
  92 #define PCI_SUBCLASS_BRIDGE_PCI_EISA    0x02
  93 #define PCI_SUBCLASS_BRIDGE_PCI_MC      0x03
  94 #define PCI_SUBCLASS_BRIDGE_PCI_PCI     0x04
  95 #define PCI_SUBCLASS_BRIDGE_PCI_PCMCIA  0x05
  96 #define PCI_SUBCLASS_BRIDGE_PCI_NUBUS   0x06
  97 #define PCI_SUBCLASS_BRIDGE_PCI_CARDBUS 0x07
  98 #define PCI_SUBCLASS_BRIDGE_OTHERS      0x80
  99 // Simple Communication
 100 #define PCI_SUBCLASS_SIMPLECOM_SERIAL   0x00
 101 #define PCI_SUBCLASS_SIMPLECOM_PARALLEL 0x01
 102 #define PCI_SUBCLASS_SIMPLECOM_OTHERS   0x80
 103 // Base System Peripherals
 104 #define PCI_SUBCLASS_BASESYSPER_PIC     0x00
 105 #define PCI_SUBCLASS_BASESYSPER_DMA     0x01
 106 #define PCI_SUBCLASS_BASESYSPER_TIMER   0x02
 107 #define PCI_SUBCLASS_BASESYSPER_RTC     0x03
 108 #define PCI_SUBCLASS_BASESYSPER_OTHERS  0x80
 109 // Input Devices
 110 #define PCI_SUBCLASS_INPUT_KEYBOARD     0x00
 111 #define PCI_SUBCLASS_INPUT_DIGITIZER    0x01
 112 #define PCI_SUBCLASS_INPUT_MOUSE        0x02
 113 #define PCI_SUBCLASS_INPUT_OTHERS       0x80
 114 // Docking Stations
 115 #define PCI_SUBCLASS_DOCKING_GENERIC    0x00
 116 #define PCI_SUBCLASS_DOCKING_OTHERS     0x80
 117 // Processors
 118 #define PCI_SUBCLASS_PROCESSORS_386     0x00
 119 #define PCI_SUBCLASS_PROCESSORS_486     0x01
 120 #define PCI_SUBCLASS_PROCESSORS_PENTIUM 0x02
 121 #define PCI_SUBCLASS_PROCESSORS_ALPHA   0x10
 122 #define PCI_SUBCLASS_PROCESSORS_PPC     0x20
 123 #define PCI_SUBCLASS_PROCESSORS_CO      0x40
 124 // Serial Bus
 125 #define PCI_SUBCLASS_SERIALBUS_FIREWIRE 0x00
 126 #define PCI_SUBCLASS_SERIALBUS_ACCESS   0x01
 127 #define PCI_SUBCLASS_SERIALBUS_SSA      0x02
 128 #define PCI_SUBCLASS_SERIALBUS_USB      0x03
 129
 130 #define pci_config_readw(dev,offset) (pci_config_readd(dev,offset&0xFC)>>((offset&0x2)*8))
 131 #define pci_config_readb(dev,offset) (pci_config_readd(dev,offset&0xFC)>>((offset&0x3)*8))
 132
 133 #define pci_get_vendorid(dev)             pci_config_readw(dev,0)
 134 #define pci_get_deviceid(dev)             pci_config_readw(dev,2)
 135 #define pci_get_classcode(dev)            pci_config_readb(dev,11)
 136 #define pci_get_subclass(dev)             pci_config_readb(dev,10)
 137 #define pci_get_present(dev)              (pci_get_vendorid(dev)!=PCI_VENDOR_NONE && pci_get_vendorid(dev)!=0)
 138 #define pci_get_irq(dev)                  pci_config_readb(dev,0x3C)
 139
 140 typedef struct {
 141   unsigned int bus;
 142   unsigned int slot;
 143   unsigned int func;
 144 } pcidev_t;
 145
 146 typedef struct {
 147   enum {
 148    PCI_BARTYPE_MEMORY = 0,
 149    PCI_BARTYPE_IOPORT = 1
 150   } type;
 151   void* addr;
 152   size_t size;
 153   uint32_t ioport;
 154 } pcibar_t;
 155
 156 uint32_t pci_config_readd(pcidev_t *dev,size_t offset);
 157 void pci_config_writed(pcidev_t *dev,size_t offset,uint32_t val);
 158 int pci_finddev_byids(pcidev_t *dev,int vendorid,int deviceid,int index);
 159 int pci_finddev_byclass(pcidev_t *dev,int classcode,int subclass,int index);
 160 pcibar_t *pci_getbar(pcidev_t *dev,int barnum);
 161
 162 #endif