i386/i386.reference/s10_02.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 10.2</TITLE>
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   7 <B>up:</B> <A HREF="c10.htm">
   8 Chapter 10 -- Initialization</A><BR>
   9 <B>prev:</B> <A HREF="s10_01.htm">10.1  Processor State After Reset</A><BR>
  10 <B>next:</B> <A HREF="s10_03.htm">10.3  Switching to Protected Mode</A>
  11 <P>
  12 <HR>
  13 <P>
  14 <H1>10.2  Software Initialization for Real-Address Mode</H1>
  15 In real-address mode a few structures must be initialized before a program
  16 can take advantage of all the features available in this mode.
  17 <P>
  18 <H2>10.2.1  Stack</H2>
  19 No instructions that use the stack can be used until the stack-segment
  20 register (SS) has been loaded. SS must point to an area in RAM.
  21 <P>
  22 <H2>10.2.2  Interrupt Table</H2>
  23 The initial state of the 80386 leaves interrupts disabled; however, the
  24 processor will still attempt to access the interrupt table if an exception
  25 or nonmaskable interrupt (NMI) occurs. Initialization software should take
  26 one of the following actions:
  27 <UL>
  28 <LI> Change the limit value in the IDTR to zero. This will cause a shutdown
  29 if an exception or nonmaskable interrupt occurs. (Refer to the 80386
  30 Hardware Reference Manual to see how shutdown is signalled externally.)
  31 <LI> Put pointers to valid interrupt handlers in all positions of the
  32 interrupt table that might be used by exceptions or interrupts.
  33 <LI> Change the IDTR to point to a valid interrupt table.
  34 </UL>
  35 <H2>10.2.3  First Instructions</H2>
  36 After RESET, address lines A{31-20} are automatically asserted for
  37 instruction fetches. This fact, together with the initial values of CS:IP,
  38 causes instruction execution to begin at physical address FFFFFFF0H. Near
  39 (intrasegment) forms of control transfer instructions may be used to pass
  40 control to other addresses in the upper 64K bytes of the address space. The
  41 first far (intersegment)
  42 <A HREF="JMP.htm">JMP</A> or
  43 <A HREF="CALL.htm">CALL</A> instruction causes A{31-20} to drop
  44 low, and the 80386 continues executing instructions in the lower one
  45 megabyte of physical memory. This automatic assertion of address lines
  46 A{31-20} allows systems designers to use a ROM at the high end of
  47 the address space to initialize the system.
  48 <P>
  49 <HR>
  50 <P>
  51 <B>up:</B> <A HREF="c10.htm">
  52 Chapter 10 -- Initialization</A><BR>
  53 <B>prev:</B> <A HREF="s10_01.htm">10.1  Processor State After Reset</A><BR>
  54 <B>next:</B> <A HREF="s10_03.htm">10.3  Switching to Protected Mode</A>
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