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4 <TITLE>80386 Programmer's Reference Manual -- Section
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9 -- Exceptions and Interrupts
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14 <H1>9.1 Identifying Interrupts
</H1>
15 The processor associates an identifying number with each different type of
16 interrupt or exception.
18 The NMI and the exceptions recognized by the processor are assigned
19 predetermined identifiers in the range
0 through
31. Not all of these
20 numbers are currently used by the
80386; unassigned identifiers in this
21 range are reserved by Intel for possible future expansion.
23 The identifiers of the maskable interrupts are determined by external
24 interrupt controllers (such as Intel's
8259A Programmable Interrupt
25 Controller) and communicated to the processor during the processor's
26 interrupt-acknowledge sequence. The numbers assigned by an
8259A PIC can be
27 specified by software. Any numbers in the range
32 through
255 can be used.
28 Table
9-
1 shows the assignment of interrupt and exception identifiers.
30 Exceptions are classified as faults, traps, or aborts depending on the way
31 they are reported and whether restart of the instruction that caused the
32 exception is supported.
37 Faults are exceptions that are reported
"before" the
38 instruction causingthe exception. Faults are either detected before
39 the instruction begins to execute, or during execution of the
40 instruction. If detected during the instruction, the fault is
41 reported with the machine restored to a state that permits the
42 instruction to be restarted.
46 A trap is an exception that is reported at the instruction
47 boundary immediately after the instruction in which the
48 exception was detected.
52 An abort is an exception that permits neither precise location
53 of the instruction causing the exception nor restart of the program
54 that caused the exception. Aborts are used to report severe errors,
55 such as hardware errors and inconsistent or illegal values in system
58 Table
9-
1. Interrupt and Exception ID Assignments
60 Identifier Description
64 2 Nonmaskable interrupt
65 3 Breakpoint (one-byte INT
3 instruction)
66 4 Overflow (INTO instruction)
67 5 Bounds check (BOUND instruction)
69 7 Coprocessor not available
73 11 Segment not present
80 32-
255 Available for external interrupts via INTR pin
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