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4 <TITLE>80386 Programmer's Reference Manual -- Section 8.2</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c08.htm">
8 Chapter 8 -- Input/Output</A><BR>
9 <B>prev:</B> <A HREF="s08_01.htm">8.1 I/O Addressing</A><BR>
10 <B>next:</B> <A HREF="s08_03.htm">8.3 Protection and I/O</A>
11 <P>
12 <HR>
13 <P>
14 <H1>8.2 I/O Instructions</H1>
15 The I/O instructions of the 80386 provide access to the processor's I/O
16 ports for the transfer of data to and from peripheral devices. These
17 instructions have as one operand the address of a port in the I/O address
18 space. There are two classes of I/O instruction:
19 <OL>
20 <LI> Those that transfer a single item (byte, word, or doubleword) located
21 in a register.
22 <LI> Those that transfer strings of items (strings of bytes, words, or
23 doublewords) located in memory. These are known as "string I/O
24 instructions" or "block I/O instructions".
25 </OL>
27 <H2>8.2.1 Register I/O Instructions</H2>
28 The I/O instructions <A HREF="IN.htm">IN</A> and
29 <A HREF="OUT.htm">OUT</A>are provided to move data between I/O ports
30 and the EAX (32-bit I/O), the AX (16-bit I/O), or AL (8-bit I/O) general
31 registers. <A HREF="IN.htm">IN</A> and
32 <A HREF="OUT.htm">OUT</A>instructions address I/O ports either directly, with
33 the address of one of up to 256 port addresses coded in the instruction, or
34 indirectly via the DX register to one of up to 64K port addresses.
35 <P>
36 <A HREF="IN.htm">IN</A> (Input from Port)
37 transfers a byte, word, or doubleword from an input
38 port to AL, AX, or EAX. If a program specifies AL with the
39 <A HREF="IN.htm">IN</A> instruction,
40 the processor transfers 8 bits from the selected port to AL. If a program
41 specifies AX with the
42 <A HREF="IN.htm">IN</A> instruction, the processor transfers 16 bits from
43 the port to AX. If a program specifies EAX with the
44 <A HREF="IN.htm">IN</A> instruction, the
45 processor transfers 32 bits from the port to EAX.
46 <P>
47 <A HREF="OUT.htm">OUT</A>(Output to Port)
48 transfers a byte, word, or doubleword to an output
49 port from AL, AX, or EAX. The program can specify the number of the port
50 using the same methods as the <A HREF="IN.htm">IN</A> instruction.
51 <P>
52 <A NAME="fig8-1">
53 <IMG align=center SRC="fig8-1.gif" border=0>
55 <H2>8.2.2 Block I/O Instructions</H2>
56 The block (or string) I/O instructions
57 <A HREF="INS.htm">INS</A> and
58 <A HREF="OUTS.htm">OUTS</A> move blocks of data
59 between I/O ports and memory space. Block I/O instructions use the DX
60 register to specify the address of a port in the I/O address space.
61 <A HREF="INS.htm">INS</A> and
62 <A HREF="OUTS.htm">OUTS</A>use DX to specify:
63 <UL>
64 <LI> 8-bit ports numbered 0 through 65535
65 <LI> 16-bit ports numbered 0, 2, 4, . . . , 65532, 65534
66 <LI> 32-bit ports numbered 0, 4, 8, . . . , 65528, 65532
67 </UL>
68 Block I/O instructions use either SI or DI to designate the source or
69 destination memory address. For each transfer, SI or DI are automatically
70 either incremented or decremented as specified by the direction bit in the
71 flags register.
72 <P>
73 <A HREF="INS.htm">INS</A> and <A HREF="OUTS.htm">OUTS</A>,
74 when used with repeat prefixes, cause block input or output
75 operations.
76 <A HREF="REP.htm">REP</A>, the repeat prefix, modifies
77 <A HREF="INS.htm">INS</A> and <A HREF="OUTS.htm">OUTS</A> to provide a means
78 of transferring blocks of data between an I/O port and memory. These block
79 I/O instructions are string primitives (refer also to
80 <A HREF="c03.htm">Chapter 3</A>
81 for more on
82 string primitives). They simplify programming and increase the speed of data
83 transfer by eliminating the need to use a separate
84 <A HREF="LOOP.htm">LOOP</A> instruction or an
85 intermediate register to hold the data.
86 <P>
87 The string I/O primitives can operate on byte strings, word strings, or
88 doubleword strings. After each transfer, the memory address in ESI or EDI is
89 updated by 1 for byte operands, by 2 for word operands, or by 4 for
90 doubleword operands. The value in the direction flag (DF) determines whether
91 the processor automatically increments ESI or EDI (DF=0) or whether it
92 automatically decrements these registers (DF=1).
93 <P>
94 <A HREF="INS.htm">INS</A>(Input String from Port)
95 transfers a byte or a word string element from
96 an input port to memory. The mnemonics
97 <A HREF="INS.htm">INSB</A>,
98 <A HREF="INS.htm">INSW</A>, and
99 <A HREF="INS.htm">INSD</A> are variants
100 that explicitly specify the size of the operand. If a program specifies
101 <A HREF="INS.htm">INSB</A>,
102 the processor transfers 8 bits from the selected port to the memory
103 location indicated by ES:EDI. If a program specifies
104 <A HREF="INS.htm">INSW</A>, the processor
105 transfers 16 bits from the port to the memory location indicated by ES:EDI.
106 If a program specifies
107 <A HREF="INS.htm">INSD</A>, the processor transfers 32 bits from the port
108 to the memory location indicated by ES:EDI. The destination segment register
109 choice (ES) cannot be changed for the
110 <A HREF="INS.htm">INS</A> instruction. Combined with the
111 <A HREF="REP.htm">REP</A> prefix,
112 <A HREF="INS.htm">INS</A> moves a block of information from an input
113 port to a series of consecutive memory locations.
115 <A HREF="OUTS.htm">OUTS</A> (Output String to Port)
116 transfers a byte, word, or doubleword string
117 element to an output port from memory. The mnemonics
118 <A HREF="OUTS.htm">OUTSB</A>,
119 <A HREF="OUTS.htm">OUTSW</A>, and
120 <A HREF="OUTS.htm">OUTSD</A>
121 are variants that explicitly specify the size of the operand. If a program
122 specifies
123 <A HREF="OUTS.htm">OUTSB</A>, the processor transfers 8 bits
124 from the memory location
125 indicated by ES:EDI to the the selected port. If a program specifies
126 <A HREF="OUTS.htm">OUTSW</A>,
127 the processor transfers 16 bits from the memory location indicated by ES:EDI
128 to the the selected port. If a program specifies
129 <A HREF="OUTS.htm">OUTSD</A>, the processor
130 transfers 32 bits from the memory location indicated by ES:EDI to the the
131 selected port. Combined with the
132 <A HREF="REP.htm">REP</A> prefix,
133 <A HREF="OUTS.htm">OUTS</A> moves a block of
134 information from a series of consecutive memory locations indicated by
135 DS:ESI to an output port.
137 <HR>
139 <B>up:</B> <A HREF="c08.htm">
140 Chapter 8 -- Input/Output</A><BR>
141 <B>prev:</B> <A HREF="s08_01.htm">8.1 I/O Addressing</A><BR>
142 <B>next:</B> <A HREF="s08_03.htm">8.3 Protection and I/O</A>
143 </BODY>