i386/i386.reference/s07_03.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 7.3</TITLE>
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   7 <B>up:</B> <A HREF="c07.htm">
   8 Chapter 7 -- Multitasking</A><BR>
   9 <B>prev:</B> <A HREF="s07_02.htm">7.2  TSS Descriptor</A><BR>
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  11 <P>
  12 <HR>
  13 <P>
  14 <H1>7.3  Task Register</H1>
  15 The task register (TR) identifies the currently executing task by pointing
  16 to the TSS.
  17 <A HREF="#fig7-3">Figure 7-3</A>
  18   shows the path by which the processor accesses the
  19 current TSS.
  20 <P>
  21 The task register has both a "visible" portion (i.e., can be read and
  22 changed by instructions) and an "invisible" portion (maintained by the
  23 processor to correspond to the visible portion; cannot be read by any
  24 instruction). The selector in the visible portion selects a TSS descriptor
  25 in the GDT. The processor uses the invisible portion to cache the base and
  26 limit values from the TSS descriptor. Holding the base and limit in a
  27 register makes execution of the task more efficient, because the processor
  28 does not need to repeatedly fetch these values from memory when it
  29 references the TSS of the current task.
  30 <P>
  31 The instructions <A HREF="LTR.htm">LTR</A> and
  32 <A HREF="STR.htm">STR</A> are used to modify and read the visible
  33 portion of the task register. Both instructions take one operand, a 16-bit
  34 selector located in memory or in a general register.
  35 <P>
  36 <A HREF="LTR.htm">LTR</A> (Load task register)
  37 loads the visible portion of the task register
  38 with the selector operand, which must select a TSS descriptor in the GDT.
  39 <A HREF="LTR.htm">LTR</A>
  40 also loads the invisible portion with information from the TSS
  41 descriptor selected by the operand.
  42 <A HREF="LTR.htm">LTR</A> is a privileged instruction; it may
  43 be executed only when CPL is zero.
  44 <A HREF="LTR.htm">LTR</A> is generally used during system
  45 initialization to give an initial value to the task register; thereafter,
  46 the contents of TR are changed by task switch operations.
  47 <P>
  48 <A HREF="STR.htm">STR</A> (Store task register)
  49 stores the visible portion of the task register
  50 in a general register or memory word.
  51 <A HREF="STR.htm">STR</A> is not privileged.
  52 <P>
  53 <A NAME="fig7-3">
  54 <IMG align=center SRC="fig7-3.gif" border=0>
  55
  56 <P>
  57 <HR>
  58 <P>
  59 <B>up:</B> <A HREF="c07.htm">
  60 Chapter 7 -- Multitasking</A><BR>
  61 <B>prev:</B> <A HREF="s07_02.htm">7.2  TSS Descriptor</A><BR>
  62 <B>next:</B> <A HREF="s07_04.htm">7.4  Task Gate Descriptor</A>
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