i386/i386.reference/s02_04.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Section 2.4</TITLE>
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   8 Chapter 2 -- Basic Programming Model</A><BR>
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  14 <H1>2.4  Instruction Format</H1>
  15 The information encoded in an 80386 instruction includes a specification of
  16 the operation to be performed, the type of the operands to be manipulated,
  17 and the location of these operands. If an operand is located in memory, the
  18 instruction must also select, explicitly or implicitly, which of the
  19 currently addressable segments contains the operand.
  20 <P>
  21 80386 instructions are composed of various elements and have various
  22 formats. The exact format of instructions is shown in Appendix B; the
  23 elements of instructions are described below. Of these instruction elements,
  24 only one, the opcode, is always present. The other elements may or may not
  25 be present, depending on the particular operation involved and on the
  26 location and type of the operands. The elements of an instruction, in order
  27 of occurrence are as follows:
  28 <UL>
  29 <LI> Prefixes -- one or more bytes preceding an instruction that modify the
  30 operation of the instruction. The following types of prefixes can be
  31 used by applications programs:
  32 <OL>
  33 <LI>Segment override -- explicitly specifies which segment register an
  34 instruction should use, thereby overriding the default
  35 segment-register selection used by the 80386 for that instruction.
  36 <LI>Address size -- switches between 32-bit and 16-bit address
  37 generation.
  38 <LI>Operand size -- switches between 32-bit and 16-bit operands.
  39 <LI>Repeat -- used with a string instruction to cause the instruction
  40 to act on each element of the string.
  41 </OL>
  42 <LI> Opcode -- specifies the operation performed by the instruction. Some
  43 operations have several different opcodes, each specifying a different
  44 variant of the operation.
  45 <LI> Register specifier -- an instruction may specify one or two register
  46 operands. Register specifiers may occur either in the same byte as the
  47 opcode or in the same byte as the addressing-mode specifier.
  48 <LI> Addressing-mode specifier -- when present, specifies whether an operand
  49 is a register or memory location; if in memory, specifies whether a
  50 displacement, a base register, an index register, and scaling are to be
  51 used.
  52 <LI> SIB (scale, index, base) byte -- when the addressing-mode specifier
  53 indicates that an index register will be used to compute the address of
  54 an operand, an SIB byte is included in the instruction to encode the
  55 base register, the index register, and a scaling factor.
  56 <LI> Displacement -- when the addressing-mode specifier indicates that a
  57 displacement will be used to compute the address of an operand, the
  58 displacement is encoded in the instruction. A displacement is a signed
  59 integer of 32, 16, or eight bits. The eight-bit form is used in the
  60 common case when the displacement is sufficiently small. The processor
  61 extends an eight-bit displacement to 16 or 32 bits, taking into
  62 account the sign.
  63 <LI> Immediate operand -- when present, directly provides the value of an
  64 operand of the instruction. Immediate operands may be 8, 16, or 32 bits
  65 wide. In cases where an eight-bit immediate operand is combined in some
  66 way with a 16- or 32-bit operand, the processor automatically extends
  67 the size of the eight-bit operand, taking into account the sign.
  68 </UL>
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  72 <B>up:</B> <A HREF="c02.htm">
  73 Chapter 2 -- Basic Programming Model</A><BR>
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  75 <B>next:</B> <A HREF="s02_05.htm">2.5  Operand Selection</A>
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