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4 <TITLE>80386 Programmer's Reference Manual -- Opcode XCHG
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14 <H1>XCHG -- Exchange Register/Memory with Register
</H1>
17 Opcode Instruction Clocks Description
19 90 + r XCHG AX,r16
3 Exchange word register with AX
20 90 + r XCHG r16,AX
3 Exchange word register with AX
21 90 + r XCHG EAX,r32
3 Exchange dword register with EAX
22 90 + r XCHG r32,EAX
3 Exchange dword register with EAX
23 86 /r XCHG r/m8,r8
3 Exchange byte register with EA byte
24 86 /r XCHG r8,r/m8
3/
5 Exchange byte register with EA byte
25 87 /r XCHG r/m16,r16
3 Exchange word register with EA word
26 87 /r XCHG r16,r/m16
3/
5 Exchange word register with EA word
27 87 /r XCHG r/m32,r32
3 Exchange dword register with EA dword
28 87 /r XCHG r32,r/m32
3/
5 Exchange dword register with EA dword
42 XCHG exchanges two operands. The operands can be in either order. If a
43 memory operand is involved, BUS LOCK is asserted for the duration of the
44 exchange, regardless of the presence or absence of the
45 <A HREF=
"LOCK.htm">LOCK
</A> prefix or of the
48 <H2>Flags Affected
</H2>
52 <H2>Protected Mode Exceptions
</H2>
54 #GP(
0) if either operand is in a nonwritable segment; #GP(
0) for an
55 illegal memory operand effective address in the CS, DS, ES, FS, or GS
56 segments; #SS(
0) for an illegal address in the SS segment; #PF(fault-code)
59 <H2>Real Address Mode Exceptions
</H2>
61 Interrupt
13 if any part of the operand would lie outside of the effective
62 address space from
0 to
0FFFFH
64 <H2>Virtual
8086 Mode Exceptions
</H2>
66 Same exceptions as in Real Address Mode; #PF(fault-code) for a page
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