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[mascara-docs.git] / i386 / i386.reference / LTR.htm
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3 <HEAD>
4 <TITLE>80386 Programmer's Reference Manual -- Opcode LTR</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c17.htm">
8 Chapter 17 -- 80386 Instruction Set</A><BR>
9 <B>prev:</B><A HREF="LSL.htm"> LSL Load Segment Limit</A><BR>
10 <B>next:</B><A HREF="MOV.htm"> MOV Move Data</A>
11 <P>
12 <HR>
13 <P>
14 <H1>LTR -- Load Task Register</H1>
16 <PRE>
17 Opcode Instruction Clocks Description
19 0F 00 /3 LTR r/m16 pm=23/27 Load EA word into task register
20 </PRE>
22 <H2>Description</H2>
24 LTR loads the task register from the source register or memory location
25 specified by the operand. The loaded task state segment is marked busy.
26 A task switch does not occur.
27 <P>
28 LTR is used only in operating system software; it is not used in
29 application programs.
31 <H2>Flags Affected</H2>
33 None
35 <H2>Protected Mode Exceptions</H2>
37 #GP(0) for an illegal memory operand effective address in the CS, DS,
38 ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment;
39 #GP(0) if the current privilege level is not 0; #GP(selector) if the object
40 named by the source selector is not a TSS or is already busy;
41 #NP(selector) if the TSS is marked "not present"; #PF(fault-code) for
42 a page fault
44 <H2>Real Address Mode Exceptions</H2>
46 Interrupt 6; LTR is not recognized in Real Address Mode
48 <H2>Virtual 8086 Mode Exceptions</H2>
50 Same exceptions as in Real Address Mode
52 <H2>Notes</H2>
54 The operand-size attribute has no effect on this instruction.
57 <P>
58 <HR>
59 <P>
60 <B>up:</B> <A HREF="c17.htm">
61 Chapter 17 -- 80386 Instruction Set</A><BR>
62 <B>prev:</B><A HREF="LSL.htm"> LSL Load Segment Limit</A><BR>
63 <B>next:</B><A HREF="MOV.htm"> MOV Move Data</A>
64 </BODY>