* remove "\r" nonsense
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4 <TITLE>80386 Programmer's Reference Manual -- Opcode LEA</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c17.htm">
8 Chapter 17 -- 80386 Instruction Set</A><BR>
9 <B>prev:</B><A HREF="LAR.htm"> LAR Load Access Rights Byte</A><BR>
10 <B>next:</B><A HREF="LEAVE.htm"> LEAVE High Level Procedure Exit</A>
11 <P>
12 <HR>
13 <P>
14 <H1>LEA -- Load Effective Address</H1>
16 <PRE>
17 Opcode Instruction Clocks Description
19 8D /r LEA r16,m 2 Store effective address for m in register r16
20 8D /r LEA r32,m 2 Store effective address for m in register r32
21 8D /r LEA r16,m 2 Store effective address for m in register r16
22 8D /r LEA r32,m 2 Store effective address for m in register r32
23 </PRE>
25 <H2>Operation</H2>
27 <PRE>
28 IF OperandSize = 16 AND AddressSize = 16
29 THEN r16 := Addr(m);
30 ELSE
31 IF OperandSize = 16 AND AddressSize = 32
32 THEN
33 r16 := Truncate_to_16bits(Addr(m)); (* 32-bit address *)
34 ELSE
35 IF OperandSize = 32 AND AddressSize = 16
36 THEN
37 r32 := Truncate_to_16bits(Addr(m));
38 ELSE
39 IF OperandSize = 32 AND AddressSize = 32
40 THEN r32 := Addr(m);
41 FI;
42 FI;
43 FI;
44 FI;
45 </PRE>
47 <H2>Description</H2>
49 LEA calculates the effective address (offset part) and stores it in the
50 specified register. The operand-size attribute of the instruction
51 (represented by OperandSize in the algorithm under "Operation" above) is
52 determined by the chosen register. The address-size attribute (represented
53 by AddressSize) is determined by the USE attribute of the segment containing
54 the second operand. The address-size and operand-size attributes affect the
55 action performed by LEA, as follows:
57 <PRE>
58 Operand Size Address Size Action Performed
60 16 16 16-bit effective address is calculated and
61 stored in requested 16-bit register
62 destination.
64 16 32 32-bit effective address is calculated. The
65 lower 16 bits of the address are stored in
66 the requested 16-bit register destination.
68 32 16 16-bit effective address is calculated. The
69 16-bit address is zero-extended and stored
70 in the requested 32-bit register destination.
72 32 32 32-bit effective address is calculated and
73 stored in the requested 32-bit register
74 destination.
75 </PRE>
77 <H2>Flags Affected</H2>
79 None
81 <H2>Protected Mode Exceptions</H2>
83 #UD if the second operand is a register
85 <H2>Real Address Mode Exceptions</H2>
87 Interrupt 6 if the second operand is a register
89 <H2>Virtual 8086 Mode Exceptions</H2>
91 Same exceptions as in Real Address Mode
94 <P>
95 <HR>
96 <P>
97 <B>up:</B> <A HREF="c17.htm">
98 Chapter 17 -- 80386 Instruction Set</A><BR>
99 <B>prev:</B><A HREF="LAR.htm"> LAR Load Access Rights Byte</A><BR>
100 <B>next:</B><A HREF="LEAVE.htm"> LEAVE High Level Procedure Exit</A>
101 </BODY>