1 /* $Id: macdefs.h,v 1.17 2011/02/18 17:16:57 ragge Exp $ */
3 * Copyright (c) 2008 Michael Shalayeff
4 * Copyright (c) 2003 Anders Magnusson (ragge@ludd.luth.se).
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * Machine-dependent defines for both passes.
35 * Convert (multi-)character constant to integer.
37 #define makecc(val,i) lastcon = (lastcon<<8)|((val<<24)>>24);
39 #define ARGINIT 128 /* # bits above fp where arguments start */
40 #define AUTOINIT 0 /* # bits below fp where automatics start */
43 * Storage space requirements
57 * Alignment constraints
69 /* #undef ALSTRUCT amd64 struct alignment is member defined */
79 #define MIN_SHORT -32768
80 #define MAX_SHORT 32767
81 #define MAX_USHORT 65535
82 #define MIN_INT (-0x7fffffff-1)
83 #define MAX_INT 0x7fffffff
84 #define MAX_UNSIGNED 0xffffffffU
85 #define MIN_LONG 0x8000000000000000L
86 #define MAX_LONG 0x7fffffffffffffffL
87 #define MAX_ULONG 0xffffffffffffffffUL
88 #define MIN_LONGLONG 0x8000000000000000LL
89 #define MAX_LONGLONG 0x7fffffffffffffffLL
90 #define MAX_ULONGLONG 0xffffffffffffffffULL
92 /* Default char is signed */
94 #define BOOL_TYPE CHAR /* what used to store _Bool */
97 * Use large-enough types.
99 typedef long long CONSZ
;
100 typedef unsigned long long U_CONSZ
;
101 typedef long long OFFSZ
;
103 #define CONFMT "%lld" /* format for printing constants */
104 #define LABFMT ".L%d" /* format for printing labels */
105 #define STABLBL ".LL%d" /* format for stab (debugging) labels */
107 #define BLANKCOMMON "_BLNK_"
108 #define MSKIREG (M(TYSHORT)|M(TYLONG))
109 #define TYIREG TYLONG
110 #define FSZLENG FSZLONG
116 #define BACKAUTO /* stack grows negatively for automatics */
117 #define BACKTEMP /* stack grows negatively for temporaries */
119 #undef FIELDOPS /* no bit-field instructions */
120 #define RTOLBYTES /* bytes are numbered right to left */
122 #define ENUMSIZE(high,low) INT /* enums are always stored in full int */
124 #define FINDMOPS /* i386 has instructions that modifies memory */
126 #define CC_DIV_0 /* division by zero is safe in the compiler */
128 /* Definitions mostly used in pass2 */
130 #define BYTEOFF(x) ((x)&07)
131 #define wdal(k) (BYTEOFF(k)==0)
132 #define BITOOR(x) (x) /* bit offset to oreg offset XXX die! */
137 #define genfcall(a,b) gencall(a,b)
139 /* How many integer registers are needed? (used for stack allocation) */
140 #define szty(t) (t < LONG || t == FLOAT ? 1 : t == LDOUBLE ? 4 : 2)
143 * The amd64 architecture has a much cleaner interface to its registers
144 * than the x86, even though a part of the register block comes from
145 * the x86 architecture. Therefore currently only two non-overlapping
146 * register classes are used; integer and xmm registers.
148 * All registers are given a sequential number to
149 * identify it which must match rnames[] in local2.c.
151 * The classes used on amd64 are:
152 * A - integer registers
190 #define MAXREGS 050 /* 40 registers */
193 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|PERMREG, \
194 SAREG|TEMPREG, SAREG|TEMPREG, 0, 0, \
195 SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, SAREG|TEMPREG, \
196 SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, SAREG|PERMREG, \
197 SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, \
198 SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, \
199 SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, \
200 SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, SBREG|TEMPREG, \
201 SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, SCREG, SCREG,
204 /* no overlapping registers at all */
206 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
207 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
208 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
209 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, \
210 { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 }, { -1 },
213 /* Return a register class based on the type of the node */
214 #define PCLASS(p) (p->n_type == FLOAT || p->n_type == DOUBLE ? SBREG : \
215 p->n_type == LDOUBLE ? SCREG : SAREG)
217 #define NUMCLASS 3 /* highest number of reg classes used */
219 int COLORMAP(int c
, int *r
);
220 #define GCLASS(x) (x < 16 ? CLASSA : x < 32 ? CLASSB : CLASSC)
221 #define DECRA(x,y) (((x) >> (y*8)) & 255) /* decode encoded regs */
222 #define ENCRD(x) (x) /* Encode dest reg in n_reg */
223 #define ENCRA1(x) ((x) << 8) /* A1 */
224 #define ENCRA2(x) ((x) << 16) /* A2 */
225 #define ENCRA(x,y) ((x) << (8+y*8)) /* encode regs in int */
227 #define RETREG(x) (x == FLOAT || x == DOUBLE ? XMM0 : \
228 x == LDOUBLE ? 32 : RAX)
231 #define FPREG RBP /* frame pointer */
232 #define STKREG RSP /* stack pointer */
234 #define SHSTR (MAXSPECIAL+1) /* short struct */
235 #define SFUNCALL (MAXSPECIAL+2) /* struct assign after function call */
236 #define SPCON (MAXSPECIAL+3) /* positive nonnamed constant */
239 * Specials that indicate the applicability of machine idioms.
241 #define SMIXOR (MAXSPECIAL+4)
242 #define SMILWXOR (MAXSPECIAL+5)
243 #define SMIHWXOR (MAXSPECIAL+6)
244 #define SCON32 (MAXSPECIAL+7) /* 32-bit constant */
247 * i386-specific symbol table flags.
249 #define SBEENHERE SLOCAL1
253 * Extended assembler macros.
255 int xasmconstregs(char *);
256 void targarg(char *w
, void *arg
, int n
);
257 #define XASM_TARGARG(w, ary) \
258 (w[1] == 'b' || w[1] == 'h' || w[1] == 'w' || w[1] == 'k' ? \
259 w++, targarg(w, ary, n), 1 : 0)
260 int numconv(void *ip
, void *p
, void *q
);
261 #define XASM_NUMCONV(ip, p, q) numconv(ip, p, q)
262 #define XASMCONSTREGS(x) xasmconstregs(x)
267 #define TARGET_VALIST
268 #define TARGET_STDARGS
269 #define TARGET_BUILTINS \
270 { "__builtin_stdarg_start", amd64_builtin_stdarg_start, 2 }, \
271 { "__builtin_va_start", amd64_builtin_stdarg_start, 2 }, \
272 { "__builtin_va_arg", amd64_builtin_va_arg, 2 }, \
273 { "__builtin_va_end", amd64_builtin_va_end, 1 }, \
274 { "__builtin_va_copy", amd64_builtin_va_copy, 2 }, \
275 { "__builtin_frame_address", i386_builtin_frame_address, -1 }, \
276 { "__builtin_return_address", i386_builtin_return_address, -1 },
278 #define NODE struct node
280 NODE
*amd64_builtin_stdarg_start(NODE
*f
, NODE
*a
, unsigned int);
281 NODE
*amd64_builtin_va_arg(NODE
*f
, NODE
*a
, unsigned int);
282 NODE
*amd64_builtin_va_end(NODE
*f
, NODE
*a
, unsigned int);
283 NODE
*amd64_builtin_va_copy(NODE
*f
, NODE
*a
, unsigned int);
284 NODE
*i386_builtin_frame_address(NODE
*f
, NODE
*a
, unsigned int);
285 NODE
*i386_builtin_return_address(NODE
*f
, NODE
*a
, unsigned int);