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4 <TITLE>80386 Programmer's Reference Manual -- Section
16.1</TITLE>
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8 Chapter
16 -- Mixing
16-Bit and
32 Bit Code
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10 <A HREF=
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16 -- Mixing
16-Bit and
32 Bit Code
</A><BR>
11 <B>next:
</B> <A HREF=
"s16_02.htm">16.2 Mixing
32-Bit and
16-Bit Operations
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15 <H1>16.1 How the
80386 Implements
16-Bit and
32-Bit Features
</H1>
16 The features of the architecture that permit the
80386 to work equally well
17 with
32-bit and
16-bit address and operand sizes include:
19 <LI> The D-bit (default bit) of code-segment descriptors, which determines
20 the default choice of operand-size and address-size for the
21 instructions of a code segment. (In real-address mode and V86 mode,
22 which do not use descriptors, the default is
16 bits.) A code segment
23 whose D-bit is set is known as a USE32 segment; a code segment whose
24 D-bit is zero is a USE16 segment. The D-bit eliminates the need to
25 encode the operand size and address size in instructions when all
26 instructions use operands and effective addresses of the same size.
27 <LI> Instruction prefixes that explicitly override the default choice of
28 operand size and address size (available in protected mode as well as
29 in real-address mode and V86 mode).
30 <LI> Separate
32-bit and
16-bit gates for intersegment control transfers
31 (including call gates, interrupt gates, and trap gates). The operand
32 size for the control transfer is determined by the type of gate, not by
33 the D-bit or prefix of the transfer instruction.
34 <LI> Registers that can be used both for
32-bit and
16-bit operands and
35 effective-address calculations.
36 <LI> The B-bit (big bit) of data-segment descriptors, which determines the
37 size of stack pointer (
32-bit ESP or
16-bit SP) used by the CPU for
38 implicit stack references.
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44 Chapter
16 -- Mixing
16-Bit and
32 Bit Code
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45 <B>prev:
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46 Chapter
16 -- Mixing
16-Bit and
32 Bit Code
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47 <B>next:
</B> <A HREF=
"s16_02.htm">16.2 Mixing
32-Bit and
16-Bit Operations
</A>