hw/i386.reference/TEST.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Opcode TEST</TITLE>
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   7 <B>up:</B> <A HREF="c17.htm">
   8 Chapter 17 -- 80386 Instruction Set</A><BR>
   9 <B>prev:</B><A HREF="SUB.htm"> SUB Integer Subtraction</A><BR>
  10 <B>next:</B><A HREF="VERR.htm"> VERR Verify a Segment for Reading or Writing</A>
  11 <P>
  12 <HR>
  13 <P>
  14 <H1>TEST -- Logical Compare</H1>
  15
  16 <PRE>
  17 Opcode       Instruction       Clocks   Description
  18
  19 A8   ib      TEST AL,imm8      2        AND immediate byte with AL
  20 A9   iw      TEST AX,imm16     2        AND immediate word with AX
  21 A9   id      TEST EAX,imm32    2        AND immediate dword with EAX
  22 F6   /0 ib   TEST r/m8,imm8    2/5      AND immediate byte with r/m byte
  23 F7   /0 iw   TEST r/m16,imm16  2/5      AND immediate word with r/m word
  24 F7   /0 id   TEST r/m32,imm32  2/5      AND immediate dword with r/m dword
  25 84   /r      TEST r/m8,r8      2/5      AND byte register with r/m byte
  26 85   /r      TEST r/m16,r16    2/5      AND word register with r/m word
  27 85   /r      TEST r/m32,r32    2/5      AND dword register with r/m dword
  28 </PRE>
  29
  30
  31 <H2>Operation</H2>
  32
  33 <PRE>
  34 DEST := LeftSRC AND RightSRC;
  35 CF := 0;
  36 OF := 0;
  37 </PRE>
  38
  39 <H2>Description</H2>
  40
  41 TEST computes the bit-wise logical AND of its two operands. Each bit
  42 of the result is 1 if both of the corresponding bits of the operands are 1;
  43 otherwise, each bit is 0. The result of the operation is discarded and only
  44 the flags are modified.
  45
  46 <H2>Flags Affected</H2>
  47
  48 OF := 0, CF := 0; SF, ZF, and PF as described in <A HREF="appc.htm">Appendix C</A>
  49
  50 <H2>Protected Mode Exceptions</H2>
  51
  52 #GP(0) for an illegal memory operand effective address in the CS, DS,
  53 ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment;
  54 #PF(fault-code) for a page fault
  55
  56 <H2>Real Address Mode Exceptions</H2>
  57
  58 Interrupt 13 if any part of the operand would lie outside of the effective
  59 address space from 0 to 0FFFFH
  60
  61 <H2>Virtual 8086 Mode Exceptions</H2>
  62
  63 Same exceptions as in Real Address Mode; #PF(fault-code) for a page
  64 fault
  65
  66
  67 <P>
  68 <HR>
  69 <P>
  70 <B>up:</B> <A HREF="c17.htm">
  71 Chapter 17 -- 80386 Instruction Set</A><BR>
  72 <B>prev:</B><A HREF="SUB.htm"> SUB Integer Subtraction</A><BR>
  73 <B>next:</B><A HREF="VERR.htm"> VERR Verify a Segment for Reading or Writing</A>
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