* better
[mascara-docs.git] / hw / i386.reference / STOS.htm
blob939afd30c631cf7c96d57b86b7309be6911ea4c6
1 <!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
2 <HTML>
3 <HEAD>
4 <TITLE>80386 Programmer's Reference Manual -- Opcode STOS</TITLE>
5 </HEAD>
6 <BODY>
7 <B>up:</B> <A HREF="c17.htm">
8 Chapter 17 -- 80386 Instruction Set</A><BR>
9 <B>prev:</B><A HREF="STI.htm"> STI Set Interrupt Flag</A><BR>
10 <B>next:</B><A HREF="STR.htm"> STR Store Task Register</A>
11 <P>
12 <HR>
13 <P>
14 <H1>STOS/STOSB/STOSW/STOSD -- Store String Data</H1>
16 <PRE>
17 Opcode Instruction Clocks Description
19 AA STOS m8 4 Store AL in byte ES:[(E)DI], update (E)DI
20 AB STOS m16 4 Store AX in word ES:[(E)DI], update (E)DI
21 AB STOS m32 4 Store EAX in dword ES:[(E)DI], update (E)DI
22 AA STOSB 4 Store AL in byte ES:[(E)DI], update (E)DI
23 AB STOSW 4 Store AX in word ES:[(E)DI], update (E)DI
24 AB STOSD 4 Store EAX in dword ES:[(E)DI], update (E)DI
25 </PRE>
28 <H2>Operation</H2>
30 <PRE>
31 IF AddressSize = 16
32 THEN use ES:DI for DestReg
33 ELSE (* AddressSize = 32 *) use ES:EDI for DestReg;
34 FI;
35 IF byte type of instruction
36 THEN
37 (ES:DestReg) := AL;
38 IF DF = 0
39 THEN DestReg := DestReg + 1;
40 ELSE DestReg := DestReg - 1;
41 FI;
42 ELSE IF OperandSize = 16
43 THEN
44 (ES:DestReg) := AX;
45 IF DF = 0
46 THEN DestReg := DestReg + 2;
47 ELSE DestReg := DestReg - 2;
48 FI;
49 ELSE (* OperandSize = 32 *)
50 (ES:DestReg) := EAX;
51 IF DF = 0
52 THEN DestReg := DestReg + 4;
53 ELSE DestReg := DestReg - 4;
54 FI;
55 FI;
56 FI;
57 </PRE>
59 <H2>Description</H2>
61 STOS transfers the contents of all AL, AX, or EAX register to the memory
62 byte or word given by the destination register relative to the ES segment.
63 The destination register is DI for an address-size attribute of 16 bits or
64 EDI for an address-size attribute of 32 bits.
65 <P>
66 The destination operand must be addressable from the ES register. A segment
67 override is not possible.
68 <P>
69 The address of the destination is determined by the contents of the
70 destination register, not by the explicit operand of STOS. This operand is
71 used only to validate ES segment addressability and to determine the data
72 type. Load the correct index value into the destination register before
73 executing STOS.
74 <P>
75 After the transfer is made, DI is automatically updated. If the direction
76 flag is 0
77 (<A HREF="CLD.htm">CLD</A> was executed), DI is incremented;
78 if the direction flag is
80 (<A HREF="STD.htm">STD</A> was executed),
81 DI is decremented. DI is incremented or decremented by
82 1 if a byte is stored, by 2 if a word is stored, or by 4 if a doubleword is
83 stored.
84 <P>
85 STOSB, STOSW, and STOSD are synonyms for the byte, word, and doubleword STOS
86 instructions, that do not require an operand. They are simpler to use, but
87 provide no type or segment checking.
88 <P>
89 STOS can be preceded by the
90 <A HREF="REP.htm">REP</A> prefix for a block fill of CX or ECX bytes,
91 words, or doublewords. Refer to the
92 <A HREF="REP.htm">REP</A> instruction for further details.
94 <H2>Flags Affected</H2>
96 None
98 <H2>Protected Mode Exceptions</H2>
100 #GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal
101 memory operand effective address in the CS, DS, ES, FS, or GS segments;
102 #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page
103 fault
105 <H2>Real Address Mode Exceptions</H2>
107 Interrupt 13 if any part of the operand would lie outside of the effective
108 address space from 0 to 0FFFFH
110 <H2>Virtual 8086 Mode Exceptions</H2>
112 Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
116 <HR>
118 <B>up:</B> <A HREF="c17.htm">
119 Chapter 17 -- 80386 Instruction Set</A><BR>
120 <B>prev:</B><A HREF="STI.htm"> STI Set Interrupt Flag</A><BR>
121 <B>next:</B><A HREF="STR.htm"> STR Store Task Register</A>
122 </BODY>