hw/i386.reference/MUL.htm

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   4 <TITLE>80386 Programmer's Reference Manual -- Opcode MUL</TITLE>
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   8 Chapter 17 -- 80386 Instruction Set</A><BR>
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  13 <P>
  14 <H1>MUL -- Unsigned Multiplication of AL or AX</H1>
  15
  16 <PRE>
  17 Opcode  Instruction     Clocks       Description
  18
  19 F6  /4  MUL AL,r/m8     9-14/12-17   Unsigned multiply (AX := AL * r/m byte)
  20 F7  /4  MUL AX,r/m16    9-22/12-25   Unsigned multiply (DX:AX := AX * r/m
  21                                      word)
  22 F7  /4  MUL EAX,r/m32   9-38/12-41   Unsigned multiply (EDX:EAX := EAX * r/m
  23                                      dword)
  24 </PRE>
  25
  26 <EM>
  27 <H3>Notes</H3>
  28   The 80386 uses an early-out multiply algorithm. The actual number of
  29   clocks depends on the position of the most significant bit in the
  30   optimizing multiplier, shown underlined above. The optimization occurs
  31   for positive and negative multiplier values. Because of the early-out
  32   algorithm, clock counts given are minimum to maximum. To calculate the
  33   actual clocks, use the following formula:
  34 <PRE>
  35     Actual clock = if  <> 0 then max(ceiling(log{2}(m)), 3) + 6 clocks;
  36
  37     Actual clock = if  = 0 then 9 clocks
  38 </PRE>
  39   where <TT>m</TT> is the multiplier.
  40 </EM>
  41
  42 <H2>Operation</H2>
  43
  44 <PRE>
  45 IF byte-size operation
  46 THEN AX := AL * r/m8
  47 ELSE (* word or doubleword operation *)
  48    IF OperandSize = 16
  49    THEN DX:AX := AX * r/m16
  50    ELSE (* OperandSize = 32 *)
  51       EDX:EAX := EAX * r/m32
  52    FI;
  53 FI;
  54 </PRE>
  55
  56 <H2>Description</H2>
  57
  58 MUL performs unsigned multiplication. Its actions depend on the size
  59 of its operand, as follows:
  60 <UL>
  61  <LI> A byte operand is multiplied by AL; the result is left in AX. The
  62      carry and overflow flags are set to 0 if AH is 0; otherwise, they are
  63      set to 1.
  64
  65  <LI> A word operand is multiplied by AX; the result is left in DX:AX.
  66      DX contains the high-order 16 bits of the product. The carry and
  67      overflow flags are set to 0 if DX is 0; otherwise, they are set to 1.
  68
  69  <LI> A doubleword operand is multiplied by EAX and the result is left in
  70      EDX:EAX. EDX contains the high-order 32 bits of the product. The
  71      carry and overflow flags are set to 0 if EDX is 0; otherwise, they are
  72      set to 1.
  73 </UL>
  74
  75 <H2>Flags Affected</H2>
  76
  77 OF and CF as described above; SF, ZF, AF, PF, and CF are undefined
  78
  79 <H2>Protected Mode Exceptions</H2>
  80
  81 #GP(0) for an illegal memory operand effective address in the CS, DS,
  82 ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment;
  83 #PF(fault-code) for a page fault
  84
  85 <H2>Real Address Mode Exceptions</H2>
  86
  87 Interrupt 13 if any part of the operand would lie outside of the effective
  88 address space from 0 to 0FFFFH
  89
  90 <H2>Virtual 8086 Mode Exceptions</H2>
  91
  92 Same exceptions as in Real Address Mode; #PF(fault-code) for a page
  93 fault
  94
  95
  96 <P>
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  98 <P>
  99 <B>up:</B> <A HREF="c17.htm">
 100 Chapter 17 -- 80386 Instruction Set</A><BR>
 101 <B>prev:</B><A HREF="MOVZX.htm"> MOVZX Move with Zero-Extend</A><BR>
 102 <B>next:</B><A HREF="NEG.htm"> NEG Two's Complement Negation</A>
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