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4 <TITLE>80386 Programmer's Reference Manual -- Opcode AND
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14 <H1>AND -- Logical AND
</H1>
16 Opcode Instruction Clocks Description
18 24 ib AND AL,imm8
2 AND immediate byte to AL
19 25 iw AND AX,imm16
2 AND immediate word to AX
20 25 id AND EAX,imm32
2 AND immediate dword to EAX
21 80 /
4 ib AND r/m8,imm8
2/
7 AND immediate byte to r/m byte
22 81 /
4 iw AND r/m16,imm16
2/
7 AND immediate word to r/m word
23 81 /
4 id AND r/m32,imm32
2/
7 AND immediate dword to r/m dword
24 83 /
4 ib AND r/m16,imm8
2/
7 AND sign-extended immediate byte
26 83 /
4 ib AND r/m32,imm8
2/
7 AND sign-extended immediate byte
28 20 /r AND r/m8,r8
2/
7 AND byte register to r/m byte
29 21 /r AND r/m16,r16
2/
7 AND word register to r/m word
30 21 /r AND r/m32,r32
2/
7 AND dword register to r/m dword
31 22 /r AND r8,r/m8
2/
6 AND r/m byte to byte register
32 23 /r AND r16,r/m16
2/
6 AND r/m word to word register
33 23 /r AND r32,r/m32
2/
6 AND r/m dword to dword register
46 Each bit of the result of the AND instruction is a
1 if both corresponding
47 bits of the operands are
1; otherwise, it becomes a
0.
49 <H2>Flags Affected
</H2>
51 CF :=
0, OF :=
0; PF, SF, and ZF as described in
<A HREF=
"appc.htm">Appendix C
</A>
53 <H2>Protected Mode Exceptions
</H2>
55 #GP(
0) if the result is in a nonwritable segment; #GP(
0) for an illegal
56 memory operand effective address in the CS, DS, ES, FS, or GS segments;
57 #SS(
0) for an illegal address in the SS segment; #PF(fault-code) for a page
60 <H2>Real Address Mode Exceptions
</H2>
62 Interrupt
13 if any part of the operand would lie outside of the effective
63 address space from
0 to
0FFFFH
65 <H2>Virtual
8086 Mode Exceptions
</H2>
67 Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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