firmware/target/sh/system-target.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Jens Arnold
  11  * Based on the work of Alan Korr and others
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22 #ifndef SYSTEM_TARGET_H
  23 #define SYSTEM_TARGET_H
  24
  25 #define or_b(mask, address) \
  26   asm                                       \
  27     ("or.b %0,@(r0,gbr)"                    \
  28      :                                      \
  29      : /* %0 */ I_CONSTRAINT((char)(mask)), \
  30        /* %1 */ "z"(address-GBR))
  31
  32 #define and_b(mask, address) \
  33   asm                                       \
  34     ("and.b %0,@(r0,gbr)"                   \
  35      :                                      \
  36      : /* %0 */ I_CONSTRAINT((char)(mask)), \
  37        /* %1 */ "z"(address-GBR))
  38
  39 #define xor_b(mask, address) \
  40   asm                                        \
  41     ("xor.b %0,@(r0,gbr)"                    \
  42      :                                       \
  43      : /* %0 */ I_CONSTRAINT((char)(mask)),  \
  44        /* %1 */ "z"(address-GBR))
  45
  46
  47 /****************************************************************************
  48  * Interrupt level setting
  49  * The level is left shifted 4 bits
  50  ****************************************************************************/
  51 #define HIGHEST_IRQ_LEVEL (15<<4)
  52
  53 static inline int set_irq_level(int level)
  54 {
  55     int i;
  56     /* Read the old level and set the new one */
  57
  58     /* Not volatile - will be optimized away if the return value isn't used */
  59     asm ("stc sr, %0" : "=r" (i));
  60     asm volatile ("ldc %0, sr" : : "r" (level));
  61     return i;
  62 }
  63
  64 static inline void enable_irq(void)
  65 {
  66     int i;
  67     asm volatile ("mov %1, %0 \n" /* Save a constant load from RAM */
  68                   "ldc %0, sr \n" : "=&r"(i) : "i"(0));
  69 }
  70
  71 #define disable_irq() \
  72     ((void)set_irq_level(HIGHEST_IRQ_LEVEL))
  73
  74 #define disable_irq_save() \
  75     set_irq_level(HIGHEST_IRQ_LEVEL)
  76
  77 #define restore_irq(i) \
  78     ((void)set_irq_level(i))
  79
  80 static inline uint16_t swap16_hw(uint16_t value)
  81   /*
  82     result[15..8] = value[ 7..0];
  83     result[ 7..0] = value[15..8];
  84   */
  85 {
  86     uint16_t result;
  87     asm volatile ("swap.b\t%1,%0" : "=r"(result) : "r"(value));
  88     return result;
  89 }
  90
  91 static inline uint32_t swaw32_hw(uint32_t value)
  92   /*
  93     result[31..16] = value[15.. 0];
  94     result[15.. 0] = value[31..16];
  95   */
  96 {
  97     uint32_t result;
  98     asm volatile ("swap.w\t%1,%0" : "=r"(result) : "r"(value));
  99     return result;
 100 }
 101
 102 static inline uint32_t swap32_hw(uint32_t value)
 103   /*
 104     result[31..24] = value[ 7.. 0];
 105     result[23..16] = value[15.. 8];
 106     result[15.. 8] = value[23..16];
 107     result[ 7.. 0] = value[31..24];
 108   */
 109 {
 110     asm volatile ("swap.b\t%0,%0\n"
 111                   "swap.w\t%0,%0\n"
 112                   "swap.b\t%0,%0\n" : "+r"(value));
 113     return value;
 114 }
 115
 116 static inline uint32_t swap_odd_even32_hw(uint32_t value)
 117 {
 118     /*
 119       result[31..24],[15.. 8] = value[23..16],[ 7.. 0]
 120       result[23..16],[ 7.. 0] = value[31..24],[15.. 8]
 121     */
 122     asm volatile ("swap.b\t%0,%0\n"
 123                   "swap.w\t%0,%0\n"
 124                   "swap.b\t%0,%0\n"
 125                   "swap.w\t%0,%0\n" : "+r"(value));
 126     return value;
 127 }
 128
 129 extern const unsigned bit_n_table[32];
 130 #define BIT_N(n) ( \
 131     __builtin_constant_p(n) \
 132     ? (1U << (n)) \
 133     : bit_n_table[n] \
 134 )
 135
 136 #endif /* SYSTEM_TARGET_H */