1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2007 by Dave Chapman
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
26 /* Externally defined interrupt handlers */
27 extern void TIMER(void);
28 extern void ADC(void);
29 extern void USB_DEVICE(void);
33 int irq
= IREQ
& 0x7fffffff;
34 CREQ
= irq
; /* Clears the corresponding IRQ status */
36 if (irq
& TIMER0_IRQ_MASK
)
38 else if (irq
& ADC_IRQ_MASK
)
41 else if (irq
& USBD_IRQ_MASK
)
45 panicf("Unhandled IRQ 0x%08X", irq
);
48 void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked
));
51 void fiq_handler(void)
57 void system_reboot(void)
61 void system_exception_wait(void)
66 /* TODO - these should live in the target-specific directories and
67 once we understand what all the GPIO pins do, move the init to the
68 specific driver for that hardware. For now, we just perform the
69 same GPIO init as the original firmware - this makes it easier to
70 investigate what the GPIO pins do.
74 static void gpio_init(void)
76 /* Do what the original firmware does */
86 GPIOA_DIR
= 0xffff1000; /* 0 - 0xf000 */
94 GPIOC_DIR
= 0x03ffffff; /* mvn r2, 0xfc000000 */
97 #elif defined(IAUDIO_7)
98 static void gpio_init(void)
100 /* Do what the original firmware does */
113 GPIOC_DIR
= 0x2000000;
117 #elif defined(SANSA_M200)
118 static void gpio_init(void)
120 /* TODO - Implement for M200 */
122 #elif defined(SANSA_C100)
123 static void gpio_init(void)
125 /* Do what the original firmware does */
132 GPIOA_DIR
= 0xFFFF0E00;
134 GPIOC_DIR
= 0x03FFFFFF;
146 /* Second function called in the original firmware's startup code - we just
147 set up the clocks in the same way as the original firmware for now. */
148 static void clock_init(void)
152 /* STP = 0x1, PW = 0x04 , HLD = 0x0 */
153 CSCFG3
= (CSCFG3
&~ 0x3fff) | 0x820;
155 /* XIN=External main, Fcpu=Fsys, BCKDIV=1 (Fbus = Fsys / 2) */
156 CLKCTRL
= (CLKCTRL
& ~0xff) | 0x14;
159 PCLKCFG0
= 0xc82d7000; /* EN1 = 1, XIN=Ext. main, DIV1 = 0x2d, P1 = 1 */
161 PCLKCFG0
= 0xc8ba7000; /* EN1 = 1, XIN=Ext. main, DIV1 = 0xba, P1 = 1 */
166 /* Only seen in the Logik DAX original firmware */
167 SDCFG
= (SDCFG
& ~0x7000) | 0x2000;
171 PLL0CFG
|= 0x80000000;
173 /* Enable PLL, M=0xcf, P=0x13. m=M+8, p=P+2, S = 0
174 Fout = (215/21)*12MHz = 122857142Hz */
175 PLL0CFG
= 0x0000cf13;
181 CLKDIVC
= 0x81000000;
183 /* Fsys = PLL0, Fcpu = Fsys, Fbus=Fsys / 2 */
184 CLKCTRL
= 0x80000010;
192 PCLKCFG5
|= (1<<31) | (4<<28); /* Timer Z-Clock enable, XIN direct*/
194 /* Set TC32 timer to be our USEC_TIMER (Xin divided by 12 = 1MHz) */
197 TC32EN
= (1<<24) | 11;
200 static void cpu_init(void)
202 /* Memory protection - see page 48 of ARM946 TRM
203 http://infocenter.arm.com/help/topic/com.arm.doc.ddi0201d/DDI0201D_arm946es_r1p1_trm.pdf
206 /* Region 0 - addr=0, size=4GB, enabled */
208 "mcr p15, 0, r0, c6, c0, 0 \n\t"
209 "mcr p15, 0, r0, c6, c0, 1 \n\t"
211 #if defined(LOGIK_DAX) || defined(SANSA_C100)
212 /* Address region 1 - addr 0x2fff0000, size=64KB, enabled*/
213 "ldr r0, =0x2fff001f \n\t"
214 #elif defined(IAUDIO_7)
215 /* Address region 1 - addr 0x20000000, size=8KB, enabled*/
217 "add r0, r0, #0x20000000 \n\t"
218 #elif defined(SANSA_M200)
219 /* Address region 1 - addr 0x20000000, size=256MB, enabled*/
221 "add r0, r0, #0x20000000 \n\t"
223 "mcr p15, 0, r0, c6, c1, 0 \n\t"
224 "mcr p15, 0, r0, c6, c1, 1 \n\t"
226 /* Address region 2 - addr 0x30000000, size=256MB, enabled*/
228 "add r0, r0, #0x30000000 \n\t"
229 "mcr p15, 0, r0, c6, c2, 0 \n\t"
230 "mcr p15, 0, r0, c6, c2, 1 \n\t"
232 /* Address region 2 - addr 0x40000000, size=512MB, enabled*/
234 "add r0, r0, #0x40000000 \n\t"
235 "mcr p15, 0, r0, c6, c3, 0 \n\t"
236 "mcr p15, 0, r0, c6, c3, 1 \n\t"
238 /* Address region 4 - addr 0x60000000, size=256MB, enabled*/
240 "add r0, r0, #0x60000000 \n\t"
241 "mcr p15, 0, r0, c6, c4, 0 \n\t"
242 "mcr p15, 0, r0, c6, c4, 1 \n\t"
244 /* Address region 5 - addr 0x10000000, size=256MB, enabled*/
246 "add r0, r0, #0x10000000 \n\t"
247 "mcr p15, 0, r0, c6, c5, 0 \n\t"
248 "mcr p15, 0, r0, c6, c5, 1 \n\t"
250 /* Address region 6 - addr 0x80000000, size=2GB, enabled*/
252 "add r0, r0, #0x80000006 \n\t"
253 "mcr p15, 0, r0, c6, c6, 0 \n\t"
254 "mcr p15, 0, r0, c6, c6, 1 \n\t"
256 /* Address region 7 - addr 0x3000f000, size=4KB, enabled*/
257 "ldr r0, =0x3000f017 \n\t"
258 "mcr p15, 0, r0, c6, c7, 0 \n\t"
259 "mcr p15, 0, r0, c6, c7, 1 \n\t"
262 /* Register 5 - Access Permission Registers */
264 "ldr r0, =0xffff \n\t"
265 "mcr p15, 0, r0, c5, c0, 0 \n\t" /* write data access permission bits */
266 "mcr p15, 0, r0, c5, c0, 1 \n\t" /* write instruction access permission bits */
269 "mcr p15, 0, r0, c3, c0, 0 \n\t" /* set write buffer control register */
271 #if defined(LOGIK_DAX) || defined(SANSA_C100)
273 #elif defined(IAUDIO_7) || defined(SANSA_M200)
276 #error NOT DEFINED FOR THIS TARGET!
278 "mcr p15, 0, r0, c2, c0, 0 \n\t"
279 "mcr p15, 0, r0, c2, c0, 1 \n\t"
281 "mov r0, #0xa0000006 \n\t"
282 "mcr p15, 0, r0, c9, c1, 0 \n\t"
284 "ldr r1, =0x1107d \n\t"
286 "mcr p15, 0, r0, c7, c5, 0 \n\t" /* Flush instruction cache */
287 "mcr p15, 0, r0, c7, c6, 0 \n\t" /* Flush data cache */
289 "mcr p15, 0, r1, c1, c0, 0 \n\t" /* CPU control bits */
296 void system_init(void)
298 /* mask all interrupts */
301 /* Set all interrupts as IRQ for now - some may need to be FIQ in future */
304 /* Set master enable bit */
314 int system_memory_guard(int newmode
)
320 #ifdef HAVE_ADJUSTABLE_CPU_FREQ
322 void set_cpu_frequency(long frequency
)