firmware/export/wm8975.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2005 by Dave Chapman
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #ifndef _WM8975_H
  23 #define _WM8975_H
  24
  25 /* volume/balance/treble/bass interdependency */
  26 #define VOLUME_MIN -730
  27 #define VOLUME_MAX  60
  28
  29 #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP)
  30
  31 extern int tenthdb2master(int db);
  32
  33 extern void audiohw_set_master_vol(int vol_l, int vol_r);
  34 extern void audiohw_set_lineout_vol(int vol_l, int vol_r);
  35 extern void audiohw_enable_lineout(bool enable);
  36
  37 /* Register addresses and bits */
  38
  39 #define LINVOL                  0x00
  40 #define LINVOL_MASK             0x3f
  41 #define LINVOL_LZCEN            (1 << 6)
  42 #define LINVOL_LINMUTE          (1 << 7)
  43 #define LINVOL_LIVU             (1 << 8)
  44
  45 #define RINVOL                  0x01
  46 #define RINVOL_MASK             0x3f
  47 #define RINVOL_RZCEN            (1 << 6)
  48 #define RINVOL_RINMUTE          (1 << 7)
  49 #define RINVOL_RIVU             (1 << 8)
  50
  51 #define LOUT1VOL                0x02
  52 #define LOUT1VOL_MASK           0x7f
  53 #define LOUT1VOL_LO1ZC          (1 << 7)
  54 #define LOUT1VOL_LO1VU          (1 << 8)
  55
  56 #define ROUT1VOL                0x03
  57 #define ROUT1VOL_MASK           0x7f
  58 #define ROUT1VOL_RO1ZC          (1 << 7)
  59 #define ROUT1VOL_RO1VU          (1 << 8)
  60
  61 #define DAPCTRL                 0x05  /* Digital audio path control */
  62 #define DAPCTRL_ADCHPD          (1 << 0)
  63 #define DAPCTRL_DEEMP_DISABLE   (0 << 1)
  64 #define DAPCTRL_DEEMP_32KHz     (1 << 1)
  65 #define DAPCTRL_DEEMP_44KHz     (2 << 1)
  66 #define DAPCTRL_DEEMP_48KHz     (3 << 1)
  67 #define DAPCTRL_DEEMP_MASK      (3 << 1)
  68 #define DAPCTRL_DACMU           (1 << 3)
  69 #define DAPCTRL_HPOR            (1 << 4)
  70 #define DAPCTRL_ADCPOL_NORMAL   (0 << 5)
  71 #define DAPCTRL_ADCPOL_LINVERT  (1 << 5)
  72 #define DAPCTRL_ADCPOL_RINVERT  (2 << 5)
  73 #define DAPCTRL_ADCPOL_LRINVERT (3 << 5)
  74 #define DAPCTRL_ADCPOL_MASK     (3 << 5)
  75 #define DAPCTRL_DACDIV2         (1 << 7)
  76 #define DAPCTRL_ADCDIV2         (1 << 8)
  77
  78 #define AINTFCE                 0x07
  79 #define AINTFCE_FORMAT_MSB_RJUST (0 << 0)
  80 #define AINTFCE_FORMAT_MSB_LJUST (1 << 0)
  81 #define AINTFCE_FORMAT_I2S      (2 << 0)
  82 #define AINTFCE_FORMAT_DSP      (3 << 0)
  83 #define AINTFCE_FORMAT_MASK     (3 << 0)
  84 #define AINTFCE_IWL_16BIT       (0 << 2)
  85 #define AINTFCE_IWL_20BIT       (1 << 2)
  86 #define AINTFCE_IWL_24BIT       (2 << 2)
  87 #define AINTFCE_IWL_32BIT       (3 << 2)
  88 #define AINTFCE_IWL_MASK        (3 << 2)
  89 #define AINTFCE_LRP_I2S_RLO     (0 << 4)
  90 #define AINTFCE_LRP_I2S_RHI     (1 << 4)
  91 #define AINTFCE_DSP_MODE_B      (0 << 4)
  92 #define AINTFCE_DSP_MODE_A      (1 << 4)
  93 #define AINTFCE_LRSWAP          (1 << 5)
  94 #define AINTFCE_MS              (1 << 6)
  95 #define AINTFCE_BCLKINV         (1 << 7)
  96
  97 #define SAMPCTRL                0x08
  98 #define SAMPCTRL_USB            (1 << 0)
  99 /* Bits 1-5:
 100  * Sample rate setting are device-specific. See datasheet
 101  * for proper settings for the device's clocking */
 102 #define SAMPCTRL_SR_MASK        (0x1f << 1)
 103 #define SAMPCTRL_CLKDIV2        (1 << 6)
 104 #define SAMPCTRL_BCM_OFF        (0 << 7)
 105 #define SAMPCTRL_BCM_MCLK_4     (1 << 7)
 106 #define SAMPCTRL_BCM_MCLK_8     (2 << 7)
 107 #define SAMPCTRL_BCM_MCLK_16    (3 << 7)
 108
 109 #define LDACVOL                 0x0a
 110 #define LDACVOL_MASK            0xff
 111 #define LDACVOL_LDVU            (1 << 8)
 112
 113 #define RDACVOL                 0x0b
 114 #define RDACVOL_MASK            0xff
 115 #define RDACVOL_RDVU            (1 << 8)
 116
 117 #define BASSCTRL                0x0c
 118 #define BASSCTRL_MASK           0x0f
 119 #define BASSCTRL_BC             (1 << 6)
 120 #define BASSCTRL_BB             (1 << 7)
 121
 122 #define TREBCTRL                0x0d
 123 #define TREBCTRL_MASK           0x0f
 124 #define TREBCTRL_TC             (1 << 6)
 125
 126 #define RESET                   0x0f
 127 #define RESET_RESET             0x0
 128
 129 /* not used atm */
 130 #define ALC1                    0x11
 131 #define ALC2                    0x12
 132 #define ALC3                    0x13
 133 #define NOISEGATE               0x14
 134
 135 #define LADCVOL                 0x15
 136 #define LADCVOL_MASK            0xff
 137 #define LADCVOL_LAVU            (1 << 8)
 138
 139 #define RADCVOL                 0x16
 140 #define RADCVOL_MASK            0xff
 141 #define RADCVOL_RAVU            (1 << 8)
 142
 143 #define ADDCTRL1                0x17
 144 #define ADDCTRL1_TOEN           (1 << 0)
 145 #define ADDCTRL1DACINV          (1 << 1)
 146 #define ADDCTRL1_DATSEL_NORMAL  (0 << 2)
 147 #define ADDCTRL1_DATSEL_LADC    (1 << 2)
 148 #define ADDCTRL1_DATSEL_RADC    (2 << 2)
 149 #define ADDCTRL1_DATSEL_SWAPPED (3 << 2)
 150 #define ADDCTRL1_DMONOMIX_STEREO    (0 << 4)
 151 #define ADDCTRL1_DMONOMIX_MONOLEFT  (1 << 4)
 152 #define ADDCTRL1_DMONOMIX_MONORIGHT (2 << 4)
 153 #define ADDCTRL1_DMONOMIX_MONO      (3 << 4)
 154 #define ADDCTRL1_VSEL_HIGHBIAS  (0 << 6)
 155 #define ADDCTRL1_VSEL_MEDBIAS   (1 << 6)
 156 #define ADDCTRL1_VSEL_LOWBIAS   (3 << 6)
 157 #define ADDCTRL1_TSDEN          (1 << 8)
 158
 159 #define ADDCTRL2                0x18
 160 #define ADDCTRL2_DACOSR         (1 << 0)
 161 #define ADDCTRL2_ADCOSR         (1 << 1)
 162 #define ADDCTRL2_LRCM           (1 << 2)
 163 #define ADDCTRL2_TRI            (1 << 3)
 164 #define ADDCTRL2_ROUT2INV       (1 << 4)
 165 #define ADDCTRL2_HPSWPOL        (1 << 5)
 166 #define ADDCTRL2_HPSWEN         (1 << 6)
 167 #define ADDCTRL2_OUT3SW_VREF    (0 << 7)
 168 #define ADDCTRL2_OUT3SW_ROUT1   (1 << 7)
 169 #define ADDCTRL2_OUT3SW_MONOOUT (2 << 7)
 170 #define ADDCTRL2_OUT3SW_ROUTMIX (3 << 7)
 171
 172 #define PWRMGMT1                0x19
 173 #define PWRMGMT1_DIGENB         (1 << 0)
 174 #define PWRMGMT1_MICB           (1 << 1)
 175 #define PWRMGMT1_ADCR           (1 << 2)
 176 #define PWRMGMT1_ADCL           (1 << 3)
 177 #define PWRMGMT1_AINR           (1 << 4)
 178 #define PWRMGMT1_AINL           (1 << 5)
 179 #define PWRMGMT1_VREF           (1 << 6)
 180 #define PWRMGMT1_VMIDSEL_OFF    (0 << 7)
 181 #define PWRMGMT1_VMIDSEL_50K    (1 << 7)
 182 #define PWRMGMT1_VMIDSEL_500K   (2 << 7)
 183 #define PWRMGMT1_VMIDSEL_5K     (3 << 7)
 184 #define PWRMGMT1_VMIDSEL_MASK   (3 << 7)
 185
 186 #define PWRMGMT2                0x1a
 187 #define PWRMGMT2_OUT3           (1 << 1)
 188 #define PWRMGMT2_MONO           (1 << 2)
 189 #define PWRMGMT2_ROUT2          (1 << 3)
 190 #define PWRMGMT2_LOUT2          (1 << 4)
 191 #define PWRMGMT2_ROUT1          (1 << 5)
 192 #define PWRMGMT2_LOUT1          (1 << 6)
 193 #define PWRMGMT2_DACR           (1 << 7)
 194 #define PWRMGMT2_DACL           (1 << 8)
 195
 196 #define ADDCTRL3                0x1b
 197 #define ADDCTRL3_HPFLREN        (1 << 5)
 198 #define ADDCTRL3_VROI           (1 << 6)
 199 #define ADDCTRL3_ADCLRM_IN      (0 << 7)
 200 #define ADDCTRL3_ADCLRM_MCLK    (1 << 7)
 201 #define ADDCTRL3_ADCLRM_MCLK_55 (2 << 7)
 202 #define ADDCTRL3_ADCLRM_MCLK_6  (3 << 7)
 203
 204 #define ADCINMODE               0x1f
 205 #define ADCINMODE_LDCM          (1 << 4)
 206 #define ADCINMODE_RDCM          (1 << 5)
 207 #define ADCINMODE_MONOMIX_STEREO  (0 << 6)
 208 #define ADCINMODE_MONOMIX_LADC    (1 << 6)
 209 #define ADCINMODE_MONOMIX_RADC    (2 << 6)
 210 #define ADCINMODE_MONOMIX_DIGITAL (3 << 6)
 211 #define ADCINMODE_DS            (1 << 8)
 212
 213 #define ADCLPATH                0x20
 214 #define ADCLPATH_LMICBOOST_OFF  (0 << 4)
 215 #define ADCLPATH_LMICBOOST_13dB (1 << 4)
 216 #define ADCLPATH_LMICBOOST_20dB (2 << 4)
 217 #define ADCLPATH_LMICBOOST_29dB (3 << 4)
 218 #define ADCLPATH_LINSEL_LIN1    (0 << 6)
 219 #define ADCLPATH_LINSEL_LIN2    (1 << 6)
 220 #define ADCLPATH_LINSEL_LIN3    (2 << 6)
 221 #define ADCLPATH_LINSEL_DIFF    (3 << 6)
 222
 223 #define ADCRPATH                0x21
 224 #define ADCRPATH_RMICBOOST_OFF  (0 << 4)
 225 #define ADCRPATH_RMICBOOST_13dB (1 << 4)
 226 #define ADCRPATH_RMICBOOST_20dB (2 << 4)
 227 #define ADCRPATH_RMICBOOST_29dB (3 << 4)
 228 #define ADCRPATH_RINSEL_RIN1    (0 << 6)
 229 #define ADCRPATH_RINSEL_RIN2    (1 << 6)
 230 #define ADCRPATH_RINSEL_RIN3    (2 << 6)
 231 #define ADCRPATH_RINSEL_DIFF    (3 << 6)
 232
 233 #define LOUTMIX1                0x22
 234 #define LOUTMIX1_LMIXSEL_LIN1   (0 << 0)
 235 #define LOUTMIX1_LMIXSEL_LIN2   (1 << 0)
 236 #define LOUTMIX1_LMIXSEL_LIN3   (2 << 0)
 237 #define LOUTMIX1_LMIXSEL_LADCIN (3 << 0)
 238 #define LOUTMIX1_LMIXSEL_DIFF   (4 << 0)
 239 #define LOUTMIX1_LMIXSEL_MASK   (7 << 0)
 240 #define LOUTMIX1_LI2LOVOL(x)    ((x & 7) << 4)
 241 #define LOUTMIX1_LI2LOVOL_MASK  (7 << 4)
 242 #define LOUTMIX1_LI2LO          (1 << 7)
 243 #define LOUTMIX1_LD2LO          (1 << 8)
 244
 245 #define LOUTMIX2                0x23
 246 #define LOUTMIX2_RI2LOVOL(x)    ((x & 7) << 4)
 247 #define LOUTMIX2_RI2LOVOL_MASK  (7 << 4)
 248 #define LOUTMIX2_RI2LO          (1 << 7)
 249 #define LOUTMIX2_RD2LO          (1 << 8)
 250
 251 #define ROUTMIX1                0x24
 252 #define ROUTMIX1_RMIXSEL_RIN1   (0 << 0)
 253 #define ROUTMIX1_RMIXSEL_RIN2   (1 << 0)
 254 #define ROUTMIX1_RMIXSEL_RIN3   (2 << 0)
 255 #define ROUTMIX1_RMIXSEL_RADCIN (3 << 0)
 256 #define ROUTMIX1_RMIXSEL_DIFF   (4 << 0)
 257 #define ROUTMIX1_RMIXSEL_MASK   (7 << 0)
 258 #define ROUTMIX1_LI2ROVOL(x)    ((x & 7) << 4)
 259 #define ROUTMIX1_LI2ROVOL_MASK  (7 << 4)
 260 #define ROUTMIX1_LI2RO          (1 << 7)
 261 #define ROUTMIX1_LD2RO          (1 << 8)
 262
 263 #define ROUTMIX2                0x25
 264 #define ROUTMIX2_RI2ROVOL(x)    ((x & 7) << 4)
 265 #define ROUTMIX2_RI2ROVOL_MASK  (7 << 4)
 266 #define ROUTMIX2_RI2RO          (1 << 7)
 267 #define ROUTMIX2_RD2RO          (1 << 8)
 268
 269 #define MOUTMIX1                0x26
 270 #define MOUTMIX1_LI2MOVOL(x)    ((x & 7) << 4)
 271 #define MOUTMIX1_LI2MOVOL_MASK  (7 << 4)
 272 #define MOUTMIX1_LI2MO          (1 << 7)
 273 #define MOUTMIX1_LD2MO          (1 << 8)
 274
 275 #define MOUTMIX2                0x27
 276 #define MOUTMIX2_RI2MOVOL(x)    ((x & 7) << 4)
 277 #define MOUTMIX2_RI2MOVOL_MASK  (7 << 4)
 278 #define MOUTMIX2_RI2MO          (1 << 7)
 279 #define MOUTMIX2_RD2MO          (1 << 8)
 280
 281 #define LOUT2VOL                0x28
 282 #define LOUT2VOL_MASK           0x7f
 283 #define LOUT2VOL_LO2ZC          (1 << 7)
 284 #define LOUT2VOL_LO2VU          (1 << 8)
 285
 286 #define ROUT2VOL                0x29
 287 #define ROUT2VOL_MASK           0x7f
 288 #define ROUT2VOL_RO2ZC          (1 << 7)
 289 #define ROUT2VOL_RO2VU          (1 << 8)
 290
 291 #define MOUTVOL                 0x2a
 292 #define MOUTVOL_MASK            0x7f
 293 #define MOUTVOL_MOZC            (1 << 7)
 294
 295 #define WM8975_NUM_REGISTERS    0x2b
 296
 297
 298 /* SAMPCTRL values for the supported samplerates: */
 299 #define WM8975_8000HZ      0x4d
 300 #define WM8975_12000HZ     0x61
 301 #define WM8975_16000HZ     0x55
 302 #define WM8975_22050HZ     0x77
 303 #define WM8975_24000HZ     0x79
 304 #define WM8975_32000HZ     0x59
 305 #define WM8975_44100HZ     0x63
 306 #define WM8975_48000HZ     0x41
 307 #define WM8975_88200HZ     0x7f
 308 #define WM8975_96000HZ     0x5d
 309
 310 #endif /* _WM8975_H */