firmware/drivers/m66591.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2009 by Karl Kurbjun
  11  * Portions Copyright (C) 2007 by Catalin Patulea
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22 /*#define LOGF_ENABLE*/
  23
  24 #include "system.h"
  25 #include "config.h"
  26 #include "string.h"
  27 #include "usb_ch9.h"
  28 #include "usb_core.h"
  29 #include "kernel.h"
  30 #include "panic.h"
  31 #include "usb_drv.h"
  32 #include "logf.h"
  33
  34 #include "cpu.h"
  35 #include "ata.h"
  36 #include "usb.h"
  37 #include "m66591.h"
  38
  39 /*******************************************************************************
  40  *  These are the driver specific defines.
  41  ******************************************************************************/
  42
  43 /* This define is primarily intended for testing, using HISPEED all the time
  44  *  should be acceptable since the device should down-train if the host does not
  45  *  support HISPEED.
  46  */
  47 #define HISPEED
  48
  49 /* Right now sending blocks till the full transfer has completed. The driver
  50  *  will work without USB_TRAN_BLOCK set, but it is more than 50% slower.
  51  *  The driver is more "Proper" without USB_TRAN_BLOCK defined so if you start
  52  *  having freezeups or trouble using USB undefine this option.
  53  */
  54 #define USB_TRAN_BLOCK
  55
  56 /*******************************************************************************
  57  * The following functions are all helpers which should not be called directly
  58  *  from the USB stack.  They should only be called by eachother, or the USB
  59  *  stack visible functions.
  60  ******************************************************************************/
  61
  62 static volatile unsigned short * pipe_ctrl_addr(int pipe);
  63 static void pipe_handshake(int pipe, int handshake);
  64 static void pipe_c_select (int pipe, bool dir);
  65 #if !defined(USB_TRAN_BLOCK)
  66 static int pipe_buffer_size (int pipe);
  67 #endif
  68 static int pipe_maxpack_size (int pipe);
  69 static void control_received(void);
  70 static void transfer_complete(int endpoint);
  71 static int mxx_transmit_receive(int endpoint);
  72 static int mxx_queue(int endpoint, void * ptr, int length, bool send,
  73     bool wait);
  74
  75 struct M66591_epstat {
  76     unsigned char dir;      /* endpoint direction */
  77     char *buf;              /* user buffer to store data */
  78     int length;             /* how match data will fit */
  79     volatile int count;     /* actual data count */
  80     bool waiting;           /* is there data to transfer? */
  81     bool busy;              /* has the pipe been requested for use? */
  82 } ;
  83
  84 static struct M66591_epstat M66591_eps[USB_NUM_ENDPOINTS];
  85
  86 /* This function is used to return the control address for each pipe */
  87 static volatile unsigned short * pipe_ctrl_addr(int pipe) {
  88     if(pipe==0) {
  89         return &M66591_DCPCTRL;
  90     } else {
  91         return &M66591_PIPECTRL1 + (pipe-1);
  92     }
  93 }
  94
  95 static void pipe_init(int pipe) {
  96     volatile unsigned short *pipe_cfg;
  97     pipe_cfg = pipe_ctrl_addr(pipe);
  98
  99     *pipe_cfg |= 1<<9;      /* ACLR */
 100     *pipe_cfg &= ~(1<<9);   /* Force de-assertion */
 101     *pipe_cfg |= 1<<8;      /* SQCLR */
 102 }
 103
 104 /* This function sets the pipe/endpoint handshake */
 105 static void pipe_handshake(int pipe, int handshake) {
 106     handshake&=0x03;
 107
 108     if(handshake == PIPE_SHAKE_STALL) {
 109         if( *(pipe_ctrl_addr(pipe)) & 0x03 ) {
 110             *(pipe_ctrl_addr(pipe)) = 0x03;
 111         } else {
 112             *(pipe_ctrl_addr(pipe)) = 0x02;
 113         }
 114     } else {
 115         *(pipe_ctrl_addr(pipe)) = handshake;
 116     }
 117 }
 118
 119 /* This function chooses the pipe desired and waits the required time before
 120  *  warites/reads are valid */
 121 static void pipe_c_select (int pipe, bool dir) {
 122     M66591_CPORT_CTRL0 = pipe | (1<<10) | (dir<<5);
 123
 124     // Wait for the Pipe to be valid;
 125     udelay(2);
 126 }
 127
 128 #if !defined(USB_TRAN_BLOCK)
 129 /* This returns the maximum buffer size of each pipe.  On this device the size
 130  *  is fixed.
 131  */
 132 static int pipe_buffer_size (int pipe) {
 133     switch(pipe) {
 134     case 0:
 135         return 256;
 136     case 1:
 137     case 2:
 138         if(M66591_PIPE_CFGWND & (1<<9) )
 139             return 1024;
 140         else
 141             return 512;
 142     case 3:
 143     case 4:
 144         return 512;
 145     case 5:
 146     case 6:
 147         return 64;
 148     default:
 149         return 0;
 150     }
 151 }
 152 #endif
 153
 154 /* This function returns the maximum packet size for each endpoint/pipe.  The
 155  *  max packet size is dependent on whether the device is running High or Full
 156  *  speed.
 157  */
 158 static int pipe_maxpack_size (int pipe) {
 159     if( (M66591_HSFS & 0xFF) == 0x03 ) { /* Device is running Highspeed */
 160         switch(pipe) {
 161         case 0:
 162             /* DCP max packet size is configurable */
 163             return M66591_DCP_MXPKSZ;
 164         case 1:
 165         case 2:
 166         case 3:
 167         case 4:
 168             return 512;
 169         case 5:
 170         case 6:
 171             return 64;
 172         default:
 173             return 0;
 174         }
 175     } else {            /* Device is running Full speed */
 176         switch(pipe) {
 177         case 0:
 178             /* DCP max packet size is configurable */
 179             return M66591_DCP_MXPKSZ;
 180         case 1:
 181         case 2:
 182         case 3:
 183         case 4:
 184             return 64;
 185         case 5:
 186         case 6:
 187             return 64;
 188         default:
 189             return 0;
 190         }
 191     }
 192 }
 193
 194 /* This is a helper function that is only called from the interupt handler.  It
 195  *  copies the control packet information from the PHY and notifies the stack.
 196  */
 197 static void control_received(void) {
 198     /* copy setup data from packet */
 199     static struct usb_ctrlrequest temp;
 200
 201     memcpy(&temp, (unsigned char*)&M66591_USB_REQ0, 8);
 202
 203     logf("mxx: bReqType=0x%02x bReq=0x%02x wVal=0x%04x"
 204         " wIdx=0x%04x wLen=0x%04x",
 205         temp.bRequestType, temp.bRequest, temp.wValue,
 206         temp.wIndex, temp.wLength);
 207
 208     /* acknowledge packet recieved (clear valid) */
 209     M66591_INTSTAT_MAIN &= ~(1<<3);
 210
 211     usb_core_control_request(&temp);
 212 }
 213
 214 /* This is a helper function, it is used to notife the stack that a transfer is
 215  *  done.
 216  */
 217 static void transfer_complete(int endpoint) {
 218     M66591_INTCFG_EMP &= ~(1 << endpoint);
 219     logf("mxx: ep %d transfer complete", endpoint);
 220     int temp=M66591_eps[endpoint].dir ? USB_DIR_IN : USB_DIR_OUT;
 221     usb_core_transfer_complete(endpoint, temp, 0,
 222         M66591_eps[endpoint].count);
 223 }
 224
 225 /* This is the main transmit routine that is typically called from the interrupt
 226  *  handler (the queue function calls it in some situations)
 227  */
 228 static int mxx_transmit_receive(int endpoint) {
 229     logf("mxx: do start");
 230
 231     /* Only the lower 15 bits of the endpoint correlate to the pipe number.
 232      *  For example pipe 2 will corelate to endpoint 0x82, so the upper bits
 233      * need to be masked out.
 234      */
 235     endpoint &= 0x7F;
 236
 237     int i;      /* Used as a loop counter */
 238     int length; /* Used in transfers to determine the amount to send/receive */
 239
 240     bool send=M66591_eps[endpoint].dir;
 241
 242     /* This is used as the internal buffer pointer */
 243     unsigned short *ptrs;
 244
 245     /* Choose the pipe that data is being transfered on */
 246     pipe_c_select(endpoint, send);
 247
 248     /* Check to see if the endpoint is ready and give it some time to become
 249      *  ready.  If it runs out of time exit out as an error.
 250      */
 251     i = 0;
 252     while (!(M66591_CPORT_CTRL1&(1<<13))) {
 253         if (i++ > 100000) {
 254             logf("mxx: FIFO %d not ready", endpoint);
 255             return -1;
 256         }
 257     }
 258
 259     /* Write to FIFO */
 260     if(send) {
 261         int maxpack=pipe_maxpack_size(endpoint);
 262 #if defined(USB_TRAN_BLOCK)
 263         length = M66591_eps[endpoint].length;
 264 #else
 265         int bufsize=pipe_buffer_size(endpoint);
 266         length=MIN(M66591_eps[endpoint].length - M66591_eps[endpoint].count,
 267             bufsize);
 268 #endif
 269
 270         /* Calculate the position in the buffer, all transfers should be 2-byte
 271          *  aligned till the last packet or short packet.
 272          */
 273         ptrs = (unsigned short *)(M66591_eps[endpoint].buf
 274             + M66591_eps[endpoint].count);
 275
 276         /* Check if the buffer is alligned */
 277         if( LIKELY(((int)ptrs) & 0x01) == 0 )
 278         {
 279             /* Start sending data in 16-bit words (fast) */
 280             for (i = 0; i < (length>>1); i++) {
 281 #if defined(USB_TRAN_BLOCK)
 282                 /* This wait is dangerous in the event that something happens
 283                  *  to the PHY pipe where it never becomes ready again, should
 284                  *  probably add a timeout, and ideally completely remove.
 285                  */
 286                 while(!(M66591_CPORT_CTRL1&(1<<13))){};
 287 #endif
 288
 289                 M66591_CPORT = *ptrs++;
 290                 M66591_eps[endpoint].count+=2;
 291             }
 292
 293             /* If the length is odd, send the last byte after setting the byte
 294              *  width of the FIFO.
 295              */
 296             if(length & 0x01) {
 297                 /* Unset MBW (8-bit transfer) */
 298                 M66591_CPORT_CTRL0 &= ~(1<<10);
 299                 M66591_CPORT = *((unsigned char *)ptrs);
 300                 M66591_eps[endpoint].count++;
 301             }
 302         }
 303         else
 304         {
 305             /* The buffer is mis-aligned - data needs to be organized first.
 306              *  This is slower than the above method.
 307              */
 308             unsigned short sbuf;
 309             unsigned char *ptrc = (unsigned char*)ptrs;
 310
 311             /* Start sending data in 16-bit words */
 312             for (i = 0; i < (length>>1); i++) {
 313 #if defined(USB_TRAN_BLOCK)
 314                 /* This wait is dangerous in the event that something happens
 315                  *  to the PHY pipe where it never becomes ready again, should
 316                  *  probably add a timeout, and ideally completely remove.
 317                  */
 318                 while(!(M66591_CPORT_CTRL1&(1<<13))){};
 319 #endif
 320
 321                 /* These are mis-aligned accesses so the data nees to be
 322                  *  arranged.
 323                  */
 324                 sbuf = (*(ptrc+1) << 8) | *ptrc;
 325                 ptrc += 2;
 326
 327                 M66591_CPORT = sbuf;
 328                 M66591_eps[endpoint].count+=2;
 329             }
 330
 331             /* If the length is odd, send the last byte after setting the byte
 332              *  width of the FIFO.
 333              */
 334             if(length & 0x01) {
 335                 /* Unset MBW (8-bit transfer) */
 336                 M66591_CPORT_CTRL0 &= ~(1<<10);
 337                 M66591_CPORT = *ptrc;
 338                 M66591_eps[endpoint].count++;
 339             }
 340         }
 341
 342         /* If the transfer is complete set up interrupts to notify when FIFO is
 343          *  EMPTY, disable READY and let the handler know that there is nothing
 344          *  left to transfer on this pipe.
 345          */
 346         if(M66591_eps[endpoint].count == M66591_eps[endpoint].length) {
 347             /* Enable Empty flag */
 348             M66591_INTCFG_EMP |= 1 << endpoint;
 349             /* Disable ready flag */
 350             M66591_INTCFG_RDY &= ~(1 << endpoint);
 351             /* Nothing left to transfer */
 352             M66591_eps[endpoint].waiting=false;
 353         } else {
 354             /* There is still data to transfer, make sure READY is enabled */
 355             M66591_INTCFG_RDY |= 1 << endpoint;
 356         }
 357
 358         /* Set BVAL if length is not a multiple of the maximum packet size */
 359         if( (length == 0) || (length % maxpack != 0) ) {
 360             logf("mxx: do set BVAL");
 361             M66591_CPORT_CTRL1 |= (1<<15) | ((length == 0) << 14);
 362         }
 363     } else {
 364         /* Read data from FIFO */
 365
 366         /* Read the number of bytes that the PHY received */
 367         int receive_length=M66591_CPORT_CTRL1 & 0x03FF;
 368
 369         /* The number of bytes to actually read is either what's left of the
 370          *  amount requested, or the amount that the PHY received.  Choose the
 371          *  smaller of the two.
 372          */
 373         length = MIN(M66591_eps[endpoint].length - M66591_eps[endpoint].count,
 374             receive_length);
 375
 376         /* If the length is zero, just clear the buffer as specified in the
 377          *  datasheet.  Otherwise read in the data (in 16-bit pieces */
 378         if(length==0) {
 379             /* Set the BCLR bit */
 380             M66591_CPORT_CTRL1 |= 1<<14;
 381         } else {
 382             /* Set the position in the buffer */
 383             ptrs = (unsigned short *)(M66591_eps[endpoint].buf
 384                 + M66591_eps[endpoint].count);
 385
 386             /* Read in the data (buffer size should be even).  The PHY cannot
 387              *  switch from 16-bit mode to 8-bit mode on an OUT buffer.
 388              */
 389             for (i = 0; i < ((length+1)>>1); i++) {
 390                 *ptrs++ = M66591_CPORT;
 391                 M66591_eps[endpoint].count+=2;
 392             }
 393         }
 394
 395         /* If the length was odd subtract 1 from the count */
 396         M66591_eps[endpoint].count -= (length&0x01);
 397
 398         /* If the requested size of data was received, or the data received was
 399          *  less than the maximum packet size end the transfer.
 400          */
 401         if( (M66591_eps[endpoint].count == M66591_eps[endpoint].length)
 402             || (length % pipe_maxpack_size(endpoint)) ) {
 403
 404             /* If the host tries to send anything else the FIFO is not ready/
 405              *  enabled yet (NAK).
 406              */
 407             pipe_handshake(endpoint, PIPE_SHAKE_NAK);
 408             /* Tell the interrupt handler that transfer is complete. */
 409             M66591_eps[endpoint].waiting=false;
 410             /* Disable ready */
 411             M66591_INTCFG_RDY &= ~(1 << endpoint);
 412
 413             /* Let the stack know that the transfer is complete */
 414             if(endpoint!=0)
 415                 transfer_complete(endpoint);
 416         }
 417     }
 418
 419     logf("mxx: do done ep %d %s len: %d cnt: %d", endpoint,
 420         send ? "out" : "in", length, M66591_eps[endpoint].count);
 421
 422     return 0;
 423 }
 424
 425 /* This function is used to start transfers.  It is a helper function for the
 426  *  usb_drv_send_nonblocking, usb_drv_send, and usb_drv_receive functions.
 427  *
 428  * The functionality for wait needs to be added.  Currently the driver is
 429  *  always used in a blocking mode(USB_TRAN_BLOCK) so it is not required.
 430  */
 431 static int mxx_queue(int endpoint, void * ptr, int length, bool send,
 432     bool wait)
 433 {
 434 #if defined(USB_TRAN_BLOCK) && !defined(LOGF_ENABLE)
 435     (void) wait;
 436 #endif
 437
 438     /* Disable IRQs */
 439     int flags = disable_irq_save();
 440
 441     /* Only the lower 15 bits of the endpoint correlate to the pipe number.
 442      *  For example pipe 2 will corelate to endpoint 0x82, so the upper bits
 443      *  need to be masked out.
 444      */
 445     endpoint &= 0x7F;
 446
 447     /* Initialize the enpoint status registers used for the transfer */
 448     M66591_eps[endpoint].buf=ptr;
 449     M66591_eps[endpoint].length=length;
 450     M66591_eps[endpoint].count=0;
 451     M66591_eps[endpoint].dir=send;
 452     M66591_eps[endpoint].waiting=true;
 453
 454     logf("mxx: queue ep %d %s, len: %d, wait: %d",
 455         endpoint, send ? "out" : "in", length, wait);
 456
 457     /* Pick the pipe that communications are happening on */
 458     pipe_c_select(endpoint, send);
 459
 460     /* All transfers start with a BUF handshake */
 461     pipe_handshake(endpoint, PIPE_SHAKE_BUF);
 462
 463     /* This USB PHY takes care of control completion packets by setting the
 464      *  CCPL bit in EP0 (endpoint 0, or DCP).  If the control state is "write no
 465      *  data tranfer" then we just need to set the CCPL bit (hopefully)
 466      *  regardless of what the stack said to send.
 467      */
 468     int control_state = (M66591_INTSTAT_MAIN & 0x07);
 469     if(endpoint==0 && control_state==CTRL_WTND) {
 470         logf("mxx: queue ep 0 ctls: 5, set ccpl");
 471
 472         /* Set CCPL */
 473         M66591_DCPCTRL |= 1<<2;
 474     } else {
 475         /* This is the standard case for transmitting data */
 476         if(send) {
 477             /* If the pipe is not ready don't try and send right away; instead
 478              *  just set the READY interrupt so that the handler can initiate
 479              *  the transfer.
 480              */
 481             if((M66591_CPORT_CTRL1&(1<<13))) {
 482                 mxx_transmit_receive(endpoint);
 483             } else {
 484                 M66591_INTCFG_RDY |= 1 << endpoint;
 485             }
 486
 487             if(length==0) {
 488                 transfer_complete(endpoint);
 489             }
 490         } else {
 491             /* When receiving data, just enable the ready interrupt, the PHY
 492              *  will trigger it and then the reads can start.
 493              */
 494             M66591_INTCFG_RDY |= 1 << endpoint;
 495         }
 496     }
 497
 498     /* Re-enable IRQs */
 499     restore_irq(flags);
 500     return 0;
 501 }
 502
 503 /*******************************************************************************
 504  * This is the interrupt handler for this driver.  It should be called from the
 505  *  target interrupt handler routine (eg. GPIO3 on M:Robe 500).
 506  ******************************************************************************/
 507 void USB_DEVICE(void)  __attribute__ ((section(".icode")));
 508 void USB_DEVICE(void) {
 509     int pipe_restore=M66591_CPORT_CTRL0;
 510     logf("\nmxx: INT BEGIN tick: %d", (int) current_tick);
 511
 512     logf("mxx: sMAIN0: 0x%04x, sRDY: 0x%04x",
 513         M66591_INTSTAT_MAIN, M66591_INTSTAT_RDY);
 514     logf("mxx:  sNRDY: 0x%04x, sEMP: 0x%04x",
 515         M66591_INTSTAT_NRDY, M66591_INTSTAT_EMP);
 516
 517     /* VBUS (connected) interrupt */
 518     while ( M66591_INTSTAT_MAIN & (1<<15) ) {
 519         M66591_INTSTAT_MAIN &= ~(1<<15);
 520
 521         /* If device is not clocked, interrupt flag must be set manually */
 522         if ( !(M66591_TRN_CTRL & (1<<10)) ) {
 523             M66591_INTSTAT_MAIN |= (1<<15);
 524         }
 525     }
 526
 527     /* Resume interrupt: This is not used. Extra logic needs to be added similar
 528     *  to the VBUS interrupt incase the PHY clock is not running.
 529     */
 530     if(M66591_INTSTAT_MAIN & (1<<14)) {
 531         M66591_INTSTAT_MAIN &= ~(1<<14);
 532         logf("mxx: RESUME");
 533     }
 534
 535     /* Device state transition interrupt: Not used, but useful for debugging */
 536     if(M66591_INTSTAT_MAIN & (1<<12)) {
 537         M66591_INTSTAT_MAIN &= ~(1<<12);
 538         logf("mxx: DEV state CHANGE=%d",
 539         ((M66591_INTSTAT_MAIN & (0x07<<4)) >> 4) );
 540     }
 541
 542     /* Control transfer stage interrupt */
 543     if(M66591_INTSTAT_MAIN & (1<<11)) {
 544         M66591_INTSTAT_MAIN &= ~(1<<11);
 545         int control_state = (M66591_INTSTAT_MAIN & 0x07);
 546
 547         logf("mxx: CTRT with CTSQ=%d", control_state);
 548
 549         switch ( control_state ) {
 550         case CTRL_IDLE:
 551             transfer_complete(0);
 552             break;
 553         case CTRL_RTDS:
 554         case CTRL_WTDS:
 555         case CTRL_WTND:
 556             /* If data is not valid stop */
 557             if(!(M66591_INTSTAT_MAIN & (1<<3)) ) {
 558                 logf("mxx: CTRT interrupt but VALID is false");
 559                 break;
 560             }
 561             control_received();
 562             break;
 563         case CTRL_RTSS:
 564         case CTRL_WTSS:
 565             pipe_handshake(0, PIPE_SHAKE_BUF);
 566             M66591_DCPCTRL |= 1<<2; /* Set CCPL */
 567             break;
 568         default:
 569             logf("mxx: CTRT with unknown CTSQ");
 570             break;
 571         }
 572     }
 573
 574     /* FIFO EMPTY interrupt: when this happens the transfer should be complete.
 575      *  When the interrupt occurs notify the stack.
 576      */
 577     if(M66591_INTSTAT_MAIN & (1<<10)) {
 578         int i;
 579         logf("mxx: INT EMPTY: 0x%04x", M66591_INTSTAT_EMP);
 580
 581         for(i=0; i<USB_NUM_ENDPOINTS; i++) {
 582             if(M66591_INTSTAT_EMP&(1<<i)) {
 583                 /* Clear the empty flag */
 584                 M66591_INTSTAT_EMP=~(1<<i);
 585                 /* Notify the stack */
 586                 transfer_complete(i);
 587             }
 588         }
 589     }
 590
 591     /* FIFO NOT READY interrupt: This is not used, but included incase the
 592      *  interrupt is endabled.
 593      */
 594     if(M66591_INTSTAT_MAIN & (1<<9)) {
 595         logf("mxx: INT NOT READY: 0x%04x", M66591_INTSTAT_NRDY);
 596         M66591_INTSTAT_NRDY = 0;
 597     }
 598
 599     /* FIFO READY interrupt: This just initiates transfers if they are needed */
 600     if(M66591_INTSTAT_MAIN & (1<<8)) {
 601         int i;
 602         logf("mxx: INT READY: 0x%04x", M66591_INTSTAT_RDY);
 603
 604         for(i=0; i<USB_NUM_ENDPOINTS; i++) {
 605             /* Was this endpoint ready and waiting */
 606             if(M66591_INTSTAT_RDY&(1<<i) && M66591_eps[i].waiting) {
 607                 /* Clear the ready flag */
 608                 M66591_INTSTAT_RDY=~(1<<i);
 609                 /* It was ready and waiting so start a transfer */
 610                 mxx_transmit_receive(i);
 611             }
 612         }
 613     }
 614
 615     /* Make sure that the INTStatus register is completely cleared. */
 616     M66591_INTSTAT_MAIN = 0;
 617
 618     /* Restore the pipe state before the interrupt occured */
 619     M66591_CPORT_CTRL0=pipe_restore;
 620     logf("mxx: INT END\n");
 621 }
 622
 623 /*******************************************************************************
 624  *  The following functions are all called by and visible to the USB stack.
 625  ******************************************************************************/
 626
 627 /* The M55691 handles this automatically, nothing to do */
 628 void usb_drv_set_address(int address) {
 629     (void) address;
 630 }
 631
 632 /* This function sets the standard test modes, it is not required, but might as
 633  *  well implement it since the hardware supports it
 634  */
 635 void usb_drv_set_test_mode(int mode) {
 636     /* This sets the test bits and assumes that mode is from 0 to 0x04 */
 637     M66591_TESTMODE &= 0x0007;
 638     M66591_TESTMODE |= mode;
 639 }
 640
 641 /* Request an unused endpoint */
 642 int usb_drv_request_endpoint(int type, int dir) {
 643     int ep;
 644     int pipecfg = 0;
 645
 646     if (type == USB_ENDPOINT_XFER_BULK) {
 647         /* Enable double buffer mode (only used for ep 1 and 2) */
 648         pipecfg |= 1<<9 | 1<<8;
 649
 650         /* Bulk endpoints must be between 1 and 4 inclusive */
 651         ep=1;
 652
 653         while(M66591_eps[ep].busy && ep++<5);
 654
 655         /* If this reached 5 the endpoints were all busy */
 656         if(ep==5) {
 657             logf("mxx: ep %d busy", ep);
 658             return -1;
 659         }
 660     } else if (type == USB_ENDPOINT_XFER_INT) {
 661         ep=5;
 662
 663         pipecfg |= 1<<13;
 664
 665         while(M66591_eps[ep].busy && ep++<7);
 666
 667         /* If this reached 7 the endpoints were all busy */
 668         if(ep==7) {
 669             logf("mxx: ep %d busy", ep);
 670             return -1;
 671         }
 672     } else {
 673         /* Not a supported type */
 674         return -1;
 675     }
 676
 677     if (dir == USB_DIR_IN) {
 678         pipecfg |= (1<<4);
 679     }
 680
 681     M66591_eps[ep].busy = true;
 682     M66591_eps[ep].dir = dir;
 683
 684     M66591_PIPE_CFGSEL=ep;
 685
 686     /* Enable pipe (15) */
 687     pipecfg |= 1<<15;
 688
 689     pipe_handshake(ep, PIPE_SHAKE_NAK);
 690
 691     /* Setup the flags */
 692     M66591_PIPE_CFGWND=pipecfg;
 693
 694     pipe_init(ep);
 695
 696     logf("mxx: ep req ep#: %d config: 0x%04x", ep, M66591_PIPE_CFGWND);
 697
 698     return ep | dir;
 699 }
 700
 701 /* Used by stack to tell the helper functions that the pipe is not in use */
 702 void usb_drv_release_endpoint(int ep) {
 703     int flags;
 704     ep &= 0x7f;
 705
 706     if (ep < 1 || ep > USB_NUM_ENDPOINTS || M66591_eps[ep].busy == false)
 707         return ;
 708
 709     flags = disable_irq_save();
 710
 711     logf("mxx: ep %d release", ep);
 712
 713     M66591_eps[ep].busy = false;
 714     M66591_eps[ep].dir = -1;
 715
 716     restore_irq(flags);
 717 }
 718
 719 /* Periodically called to check if a cable was plugged into the device */
 720 inline int usb_detect(void)
 721 {
 722     if(M66591_INTSTAT_MAIN&(1<<7))
 723         return USB_INSERTED;
 724     else
 725         return USB_EXTRACTED;
 726 }
 727
 728 void usb_enable(bool on) {
 729     logf("mxx: %s: %s", __FUNCTION__, on ? "true" : "false");
 730     if (on)
 731         usb_core_init();
 732     else
 733         usb_core_exit();
 734 }
 735
 736 /* This is where the driver stuff starts */
 737 void usb_drv_init(void) {
 738     logf("mxx: Device Init");
 739
 740     M66591_PIN_CFG1         = 0x8000; /* Drive Current: 3.3V setting */
 741     M66591_PIN_CFG2         = 0x0000;
 742
 743     M66591_TRN_CTRL         = 0x8000; /* External 48 MHz clock */
 744     M66591_TRN_CTRL         |=0x0001;
 745
 746     M66591_INTCFG_MAIN      |=0x8000; /* Enable VBUS interrupt */
 747 }
 748
 749 /* fully enable driver */
 750 void usb_attach(void) {
 751     int i;
 752
 753     /* Reset Endpoint states */
 754     for(i=0; i<USB_NUM_ENDPOINTS; i++) {
 755         M66591_eps[i].dir = -1;
 756         M66591_eps[i].buf = (char *) 0;
 757         M66591_eps[i].length = 0;
 758         M66591_eps[i].count = 0;
 759         M66591_eps[i].waiting = false;
 760         M66591_eps[i].busy = false;
 761     }
 762
 763     /* Issue a h/w reset */
 764     usb_init_device();
 765     usb_core_init();
 766
 767     /* USB Attach Process: This follows the flow diagram in the M66591GP
 768      *  Reference Manual Rev 1.00, p. 77 */
 769
 770 #if defined(HISPEED)
 771     /* Run Hi-Speed */
 772     M66591_TRN_CTRL |= 1<<7;
 773 #else
 774     /* Run Full-Speed */
 775     M66591_TRN_CTRL &= ~(1<<7);
 776 #endif
 777
 778     /* Enable oscillation buffer XCKE */
 779     M66591_TRN_CTRL |= (1<<13);
 780
 781     udelay(1500);
 782
 783     /* Enable reference clock, PLL RCKE */
 784     M66591_TRN_CTRL |= (3<<11);
 785
 786     udelay(9);
 787
 788     /* Enable internal clock supply SCKE */
 789     M66591_TRN_CTRL |= (1<<10);
 790
 791     /* Disable PIPE ready interrupts */
 792     M66591_INTCFG_RDY = 0;
 793
 794     /* Disable PIPE not-ready interrupts */
 795     M66591_INTCFG_NRDY = 0;
 796
 797     /* Disable PIPE empyt/size error interrupts */
 798     M66591_INTCFG_EMP = 0;
 799
 800     /* Enable all interrupts except NOT READY, RESUME, and VBUS */
 801     M66591_INTCFG_MAIN = 0x1DFF;
 802
 803     pipe_c_select(0, false);
 804
 805     /* Enable continuous transfer mode on the DCP */
 806     M66591_DCP_CNTMD |= (1<<8);
 807
 808     /* Set the threshold that the PHY will automatically transmit from EP0 */
 809     M66591_DCP_CTRLEN = 256;
 810
 811     pipe_handshake(0, PIPE_SHAKE_NAK);
 812
 813     /* Set the Max packet size to 64 */
 814     M66591_DCP_MXPKSZ = 64;
 815
 816     /* Attach notification to PC (D+ pull-up) */
 817     M66591_TRN_CTRL |= (1<<4);
 818
 819     logf("mxx: attached");
 820 }
 821
 822 void usb_drv_exit(void) {
 823     /* USB Detach Process: This follows the flow diagram in the M66591GP
 824      *  Reference Manual Rev 1.00, p. 78.
 825      */
 826
 827     /* Detach notification to PC (disable D+ pull-up) */
 828     M66591_TRN_CTRL &= ~(1<<4);
 829
 830     /* Software reset */
 831     M66591_TRN_CTRL &= ~0x01;
 832
 833     /* Disable internal clock supply */
 834     M66591_TRN_CTRL &= ~(1<<10);
 835     udelay(3);
 836
 837     /* Disable PLL */
 838     M66591_TRN_CTRL &= ~(1<<11);
 839     udelay(3);
 840
 841     /* Disable internal reference clock */
 842     M66591_TRN_CTRL &= ~(1<<12);
 843     udelay(3);
 844
 845     /* Disable oscillation buffer, reenable USB operation */
 846     M66591_TRN_CTRL &= ~(1<<13);
 847
 848     M66591_TRN_CTRL |= 0x01;
 849
 850     logf("mxx: detached");
 851 }
 852
 853 /* This function begins a transmit (on an IN endpoint), it should not block
 854  *  so the actual transmit is done in the interrupt handler.
 855  */
 856 int usb_drv_send_nonblocking(int endpoint, void* ptr, int length)
 857 {
 858     return mxx_queue(endpoint, ptr, length, true, false);
 859 }
 860
 861 /* This function begins a transmit (on an IN endpoint), it does not block
 862  *  so the actual transmit is done in the interrupt handler.
 863  */
 864 int usb_drv_send(int endpoint, void* ptr, int length)
 865 {
 866     return mxx_queue(endpoint, ptr, length, true, true);
 867 }
 868
 869 /* This function begins a receive (on an OUT endpoint), it should not block
 870  *  so the actual receive is done in the interrupt handler.
 871  */
 872 int usb_drv_recv(int endpoint, void* ptr, int length)
 873 {
 874     return mxx_queue(endpoint, ptr, length, false, false);
 875 }
 876
 877 /* This function checks the reset handshake speed status
 878  *  (Fullspeed or Highspeed)
 879  */
 880 int usb_drv_port_speed(void)
 881 {
 882     int handshake = (M66591_HSFS & 0xFF);
 883
 884     if( handshake == 0x02) {
 885         return 0; /* Handshook at Full-Speed */
 886     } else if( handshake == 0x03) {
 887         return 1; /* Handshook at Hi-Speed */
 888     } else {
 889         return -1; /* Error, handshake may not be complete */
 890     }
 891 }
 892
 893 /* This function checks if the endpoint is stalled (error).  I am not sure what
 894  *  the "in" variable is intended for.
 895  */
 896 bool usb_drv_stalled(int endpoint,bool in)
 897 {
 898     (void) in;
 899
 900     bool stalled = (*(pipe_ctrl_addr(endpoint)) & (0x02)) ? true : false;
 901
 902     logf("mxx: stall?: %s ep: %d", stalled ? "true" : "false", endpoint);
 903
 904     if(stalled) {
 905         return true;
 906     } else {
 907         return false;
 908     }
 909 }
 910
 911 /* This function stalls/unstalls the endpoint.  Stalls only happen on error so
 912  *  if the endpoint is functioning properly this should not be called.  I am
 913  *  not sure what the "in" variable is intended for.
 914  */
 915 void usb_drv_stall(int endpoint, bool stall,bool in)
 916 {
 917     (void) in;
 918
 919     logf("mxx: stall - ep: %d", endpoint);
 920
 921     if(stall) {
 922         /* Stall the pipe (host needs to intervene/error) */
 923         pipe_handshake(endpoint, PIPE_SHAKE_STALL);
 924     } else {
 925         /* Setting this to a NAK, not sure if it is appropriate */
 926         pipe_handshake(endpoint, PIPE_SHAKE_NAK);
 927     }
 928 }
 929
 930 /* !!!!!!!!!!This function is likely incomplete!!!!!!!!!!!!!! */
 931 void usb_drv_cancel_all_transfers(void)
 932 {
 933     int endpoint;
 934     int flags;
 935
 936     logf("mxx: %s", __func__);
 937
 938     flags = disable_irq_save();
 939     for (endpoint = 0; endpoint < USB_NUM_ENDPOINTS; endpoint++) {
 940         if (M66591_eps[endpoint].buf) {
 941             M66591_eps[endpoint].buf = NULL;
 942         }
 943     }
 944
 945     restore_irq(flags);
 946 }
 947