firmware/export/hd66789r.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2004 by Linus Nielsen Feltzing
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #ifndef _HD66789R_H_
  23 #define _HD66789R_H_
  24
  25 /* HD66789R registers */
  26 #define R_START_OSC             0x00
  27 #define R_DRV_OUTPUT_CONTROL    0x01
  28 #define R_DRV_WAVEFORM_CONTROL  0x02
  29 #define R_ENTRY_MODE            0x03
  30 #define R_COMPARE_REG1          0x04
  31 #define R_COMPARE_REG2          0x05
  32
  33 #define R_DISP_CONTROL1     0x07
  34 #define R_DISP_CONTROL2     0x08
  35 #define R_DISP_CONTROL3     0x09
  36
  37 #define R_FRAME_CYCLE_CONTROL 0x0b
  38 #define R_EXT_DISP_IF_CONTROL 0x0c
  39
  40 #define R_POWER_CONTROL1    0x10
  41 #define R_POWER_CONTROL2    0x11
  42 #define R_POWER_CONTROL3    0x12
  43 #define R_POWER_CONTROL4    0x13
  44
  45 #define R_RAM_ADDR_SET  0x21
  46 #define R_WRITE_DATA_2_GRAM 0x22
  47
  48 #define R_GAMMA_FINE_ADJ_POS1   0x30
  49 #define R_GAMMA_FINE_ADJ_POS2   0x31
  50 #define R_GAMMA_FINE_ADJ_POS3   0x32
  51 #define R_GAMMA_GRAD_ADJ_POS    0x33
  52
  53 #define R_GAMMA_FINE_ADJ_NEG1   0x34
  54 #define R_GAMMA_FINE_ADJ_NEG2   0x35
  55 #define R_GAMMA_FINE_ADJ_NEG3   0x36
  56 #define R_GAMMA_GRAD_ADJ_NEG    0x37
  57
  58 #define R_GAMMA_AMP_ADJ_RES_POS     0x38
  59 #define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
  60
  61 #define R_GATE_SCAN_POS         0x40
  62 #define R_VERT_SCROLL_CONTROL   0x41
  63 #define R_1ST_SCR_DRV_POS       0x42
  64 #define R_2ND_SCR_DRV_POS       0x43
  65 #define R_HORIZ_RAM_ADDR_POS    0x44
  66 #define R_VERT_RAM_ADDR_POS     0x45
  67
  68 #endif /* _HD66789R_H_ */