3 /* These output formats should be in the config-files */
6 OUTPUT_FORMAT(elf32-m68k)
8 OUTPUT_FORMAT(elf32-littlearm)
10 OUTPUT_FORMAT(elf32-sh)
11 #elif defined(CPU_MIPS)
12 OUTPUT_FORMAT(elf32-littlemips)
14 /* We can have an #error here we don't use this file when build sims! */
15 #error Unknown CPU architecture
19 #define STUBOFFSET 0x10000
26 #define NOCACHE_BASE 0x10000000
28 #define NOCACHE_BASE 0x28000000
30 #define CACHEALIGN_SIZE 16
33 #if CONFIG_CPU==IMX31L
36 #define DRAMSIZE ((MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE \
37 - CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
39 #elif CONFIG_CPU==DM320
41 /* Give this 1 meg to allow it to align to the MMU boundary */
42 #ifndef LCD_NATIVE_WIDTH
43 #define LCD_NATIVE_WIDTH LCD_WIDTH
46 #ifndef LCD_NATIVE_HEIGHT
47 #define LCD_NATIVE_HEIGHT LCD_HEIGHT
50 #define LCD_FUDGE LCD_NATIVE_WIDTH%32
51 #define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
52 #define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
54 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
56 #elif CONFIG_CPU==S3C2440
58 /* must be 16Kb (0x4000) aligned */
59 #define TTB_SIZE (0x4000)
60 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
62 #elif CONFIG_CPU==TCC7801
64 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
66 #elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
68 #define DRAMORIG DRAM_ORIG
69 #if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
70 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE)
72 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
74 #elif CONFIG_CPU==S5L8702
77 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
78 #elif CONFIG_CPU==IMX233
80 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - FRAME_SIZE - TTB_SIZE)
83 /* default to full RAM (minus codecs&plugins) unless specified otherwise */
85 #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
88 /* MCF5249 have 96KB of IRAM */
89 #if CONFIG_CPU == MCF5249
90 #define DRAMORIG 0x31000000
91 #define IRAMORIG 0x1000c000
92 #define IRAMSIZE 0xc000
94 /* MCF5250 have 128KB of IRAM */
95 #elif CONFIG_CPU == MCF5250
96 #define DRAMORIG 0x31000000
97 #define IRAMORIG 0x1000c000
98 #define IRAMSIZE 0x14000
100 #elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
101 /* PP5022/24 have 128KB of IRAM */
102 #define DRAMORIG 0x00000000
103 #define IRAMORIG 0x4000c000
104 #define IRAMSIZE 0x14000
106 #elif defined(CPU_PP)
107 /* all other PP's have 96KB of IRAM */
108 #define DRAMORIG 0x00000000
109 #define IRAMORIG 0x4000c000
110 #define IRAMSIZE 0x0c000
112 #elif CONFIG_CPU == PNX0101
113 #define DRAMORIG 0xc00000 + STUBOFFSET
114 #define IRAMORIG 0x407000
115 #define IRAMSIZE 0x9000
117 #elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
118 #define DRAMORIG 0x0 + STUBOFFSET
122 #elif CONFIG_CPU==DM320
123 #define DRAMORIG CONFIG_SDRAM_START + STUBOFFSET
125 /* The bit of IRAM that is available is used in the core */
128 #elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
129 #define DRAMORIG 0x20000000
130 #if CONFIG_CPU==TCC7801
131 #define IRAMORIG 0x1000c000
132 #define IRAMSIZE 0xc000
138 #elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
139 #if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
140 #define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
141 #define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
142 #define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
144 #define IRAMORIG (IRAM_ORIG + 0x20000)
145 #define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
148 #elif CONFIG_CPU==S5L8700
149 /* S5L8700 have 256KB of IRAM */
150 #define DRAMORIG 0x08000000
151 #define IRAMORIG (0x00000000 + (48*1024))
152 #define IRAMSIZE (208*1024)
154 #elif CONFIG_CPU==S5L8701
155 /* S5L8701 have 176KB of IRAM */
156 #define DRAMORIG 0x08000000
157 #define IRAMORIG (0x00000000 + (48*1024))
158 #define IRAMSIZE (128*1024)
160 #elif CONFIG_CPU==S5L8702
161 /* S5L8702 have 256KB of IRAM */
162 #define DRAMORIG 0x08000000
163 #define IRAMORIG (0x00000000 + (56*1024))
164 #define IRAMSIZE (200*1024)
166 #elif CONFIG_CPU == JZ4732
167 #define DRAMORIG 0x80004000 + STUBOFFSET
170 /* The bit of IRAM that is available is used in the core */
172 #elif CONFIG_CPU == RK27XX
173 #define DRAMORIG 0x60000000
177 #elif CONFIG_CPU == IMX233
179 /* The IRAM is too small and already partly used by the core */
180 #define DRAMORIG CACHED_DRAM_ADDR
185 #define DRAMORIG 0x09000000 + STUBOFFSET
189 /* Default to no offset if target doesn't define this */
190 #define NOCACHE_BASE 0x00000000
193 #define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
196 #ifndef CODEC_ORIGIN /* targets can specify another origin */
197 #define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
200 #ifndef PLUGIN_ORIGIN /* targets can specify another origin */
201 #define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
205 #define THIS_LENGTH CODEC_SIZE
206 #define THIS_ORIGIN CODEC_ORIGIN
207 #elif defined OVERLAY_OFFSET
208 #define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
209 #define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
210 #elif defined IMGVDECODER_OFFSET
211 #define THIS_LENGTH (PLUGIN_LENGTH - IMGVDECODER_OFFSET)
212 #define THIS_ORIGIN (PLUGIN_ORIGIN + IMGVDECODER_OFFSET)
214 #define THIS_LENGTH PLUGIN_LENGTH
215 #define THIS_ORIGIN PLUGIN_ORIGIN
220 PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
221 #if defined(IRAMSIZE) && IRAMSIZE != 0
222 PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
229 _plugin_start_addr = .;
230 plugin_start_addr = .;
237 #if defined(IRAMSIZE) && IRAMSIZE == 0
249 #if defined(IRAMSIZE) && IRAMSIZE == 0
258 #if defined(IRAMSIZE) && IRAMSIZE == 0
263 #if NOCACHE_BASE != 0
264 .ncdata . + NOCACHE_BASE :
266 . = ALIGN(CACHEALIGN_SIZE);
268 . = ALIGN(CACHEALIGN_SIZE);
269 /* EABI currently needs iramcopy defined here, otherwise .iram can sometimes
270 have an incorrect load address, breaking codecs. */
271 #if defined(IRAMSIZE)
272 iramcopy = . - NOCACHE_BASE;
275 /* This definition is used when NOCACHE_BASE is 0. The address offset bug only
276 seems to occur when the empty .ncdata is present. */
277 #elif defined(IRAMSIZE)
289 #if defined(IRAMSIZE) && IRAMSIZE != 0
290 .iram IRAMORIG : AT ( iramcopy)
311 plugin_bss_start = .;
312 _plugin_bss_start = .;
314 #if defined(IRAMSIZE) && IRAMSIZE == 0
321 #if NOCACHE_BASE != 0
322 .ncbss . + NOCACHE_BASE (NOLOAD) :
324 . = ALIGN(CACHEALIGN_SIZE);
326 . = ALIGN(CACHEALIGN_SIZE);
331 .pluginend . - NOCACHE_BASE :
333 _plugin_end_addr = .;
337 /* Special trick to avoid a linker error when no other sections are
338 left after garbage collection (plugin not for this platform) */