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android: lcd_update/_rect() changes
[maemo-rb.git] / firmware / export / wm8978.h
blobf591c1b9fb2a166c7fe2212360478c8000fd895a
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 by Michael Sevakis
11 *
12 * Header file for WM8978 codec
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23 #ifndef _WM8978_H
24 #define _WM8978_H
25
26 #define VOLUME_MIN -900
27 #define VOLUME_MAX 60
28
29 #define AUDIOHW_CAPS (EQ_CAP | PRESCALER_CAP | DEPTH_3D_CAP)
30 /* Filter bitmask */
31 #define AUDIOHW_EQ_BAND_CAPS ((EQ_CAP << 0) | (EQ_CAP << 1) | \
32 (EQ_CAP << 2) | (EQ_CAP << 3) | \
33 (EQ_CAP << 4))
34 /* Filters that can adjust cutoff and center frequency */
35 #define AUDIOHW_EQ_FREQUENCY_CAPS ((EQ_CAP << 0) | (EQ_CAP << 1) | \
36 (EQ_CAP << 2) | (EQ_CAP << 3) | \
37 (EQ_CAP << 4))
38 /* Filters that can adjust band width */
39 #define AUDIOHW_EQ_WIDTH_CAPS ((EQ_CAP << 1) | (EQ_CAP << 2) | \
40 (EQ_CAP << 3))
41
42 int tenthdb2master(int db);
43 void audiohw_set_headphone_vol(int vol_l, int vol_r);
44 void audiohw_set_recsrc(int source, bool recording);
45
46 void wmc_set(unsigned int reg, unsigned int bits);
47 void wmc_clear(unsigned int reg, unsigned int bits);
48
49 #define WMC_I2C_ADDR 0x34
50
51 /* Registers */
52 #define WMC_SOFTWARE_RESET 0x00
53 #define WMC_POWER_MANAGEMENT1 0x01
54 #define WMC_POWER_MANAGEMENT2 0x02
55 #define WMC_POWER_MANAGEMENT3 0x03
56 #define WMC_AUDIO_INTERFACE 0x04
57 #define WMC_COMPANDING_CTRL 0x05
58 #define WMC_CLOCK_GEN_CTRL 0x06
59 #define WMC_ADDITIONAL_CTRL 0x07
60 #define WMC_GPIO 0x08
61 #define WMC_JACK_DETECT_CONTROL1 0x09
62 #define WMC_DAC_CONTROL 0x0a
63 #define WMC_LEFT_DAC_DIGITAL_VOL 0x0b
64 #define WMC_RIGHT_DAC_DIGITAL_VOL 0x0c
65 #define WMC_JACK_DETECT_CONTROL2 0x0d
66 #define WMC_ADC_CONTROL 0x0e
67 #define WMC_LEFT_ADC_DIGITAL_VOL 0x0f
68 #define WMC_RIGHT_ADC_DIGITAL_VOL 0x10
69 #define WMC_EQ1_LOW_SHELF 0x12
70 #define WMC_EQ2_PEAK1 0x13
71 #define WMC_EQ3_PEAK2 0x14
72 #define WMC_EQ4_PEAK3 0x15
73 #define WMC_EQ5_HIGH_SHELF 0x16
74 #define WMC_DAC_LIMITER1 0x18
75 #define WMC_DAC_LIMITER2 0x19
76 #define WMC_NOTCH_FILTER1 0x1b
77 #define WMC_NOTCH_FILTER2 0x1c
78 #define WMC_NOTCH_FILTER3 0x1d
79 #define WMC_NOTCH_FILTER4 0x1e
80 #define WMC_ALC_CONTROL1 0x20
81 #define WMC_ALC_CONTROL2 0x21
82 #define WMC_ALC_CONTROL3 0x22
83 #define WMC_NOISE_GATE 0x23
84 #define WMC_PLL_N 0x24
85 #define WMC_PLL_K1 0x25
86 #define WMC_PLL_K2 0x26
87 #define WMC_PLL_K3 0x27
88 #define WMC_3D_CONTROL 0x29
89 #define WMC_BEEP_CONTROL 0x2b
90 #define WMC_INPUT_CTRL 0x2c
91 #define WMC_LEFT_INP_PGA_GAIN_CTRL 0x2d
92 #define WMC_RIGHT_INP_PGA_GAIN_CTRL 0x2e
93 #define WMC_LEFT_ADC_BOOST_CTRL 0x2f
94 #define WMC_RIGHT_ADC_BOOST_CTRL 0x30
95 #define WMC_OUTPUT_CTRL 0x31
96 #define WMC_LEFT_MIXER_CTRL 0x32
97 #define WMC_RIGHT_MIXER_CTRL 0x33
98 #define WMC_LOUT1_HP_VOLUME_CTRL 0x34
99 #define WMC_ROUT1_HP_VOLUME_CTRL 0x35
100 #define WMC_LOUT2_SPK_VOLUME_CTRL 0x36
101 #define WMC_ROUT2_SPK_VOLUME_CTRL 0x37
102 #define WMC_OUT3_MIXER_CTRL 0x38
103 #define WMC_OUT4_MONO_MIXER_CTRL 0x39
104 #define WMC_NUM_REGISTERS 0x3a
105
106 /* Register bitmasks */
107
108 /* Volume update bit for volume registers */
109 #define WMC_VU (1 << 8)
110
111 /* Zero-crossing bit for volume registers */
112 #define WMC_ZC (1 << 7)
113
114 /* Mute bit for volume registers */
115 #define WMC_MUTE (1 << 6)
116
117 /* Volume masks and macros for digital volumes */
118 #define WMC_DVOL 0xff
119
120 /* Volums masks and macros for analogue volumes */
121 #define WMC_AVOL 0x3f
122
123 /* WMC_SOFTWARE_RESET (0x00) */
124 #define WMC_RESET
125 /* Write any value */
126
127 /* WMC_POWER_MANAGEMENT1 (0x01) */
128 #define WMC_BUFDCOMPEN (1 << 8)
129 #define WMC_OUT4MIXEN (1 << 7)
130 #define WMC_OUT3MIXEN (1 << 6)
131 #define WMC_PLLEN (1 << 5)
132 #define WMC_MICBEN (1 << 4)
133 #define WMC_BIASEN (1 << 3)
134 #define WMC_BUFIOEN (1 << 2)
135 #define WMC_VMIDSEL (3 << 0)
136 #define WMC_VMIDSEL_OFF (0 << 0)
137 #define WMC_VMIDSEL_75K (1 << 0)
138 #define WMC_VMIDSEL_300K (2 << 0)
139 #define WMC_VMIDSEL_5K (3 << 0)
140
141 /* WMC_POWER_MANAGEMENT2 (0x02) */
142 #define WMC_ROUT1EN (1 << 8)
143 #define WMC_LOUT1EN (1 << 7)
144 #define WMC_SLEEP (1 << 6)
145 #define WMC_BOOSTENR (1 << 5)
146 #define WMC_BOOSTENL (1 << 4)
147 #define WMC_INPPGAENR (1 << 3)
148 #define WMC_INPPGAENL (1 << 2)
149 #define WMC_ADCENR (1 << 1)
150 #define WMC_ADCENL (1 << 0)
151
152 /* WMC_POWER_MANAGEMENT3 (0x03) */
153 #define WMC_OUT4EN (1 << 8)
154 #define WMC_OUT3EN (1 << 7)
155 #define WMC_LOUT2EN (1 << 6)
156 #define WMC_ROUT2EN (1 << 5)
157 #define WMC_RMIXEN (1 << 3)
158 #define WMC_LMIXEN (1 << 2)
159 #define WMC_DACENR (1 << 1)
160 #define WMC_DACENL (1 << 0)
161
162 /* WMC_AUDIO_INTERFACE (0x04) */
163 #define WMC_BCP (1 << 8)
164 #define WMC_LRP (1 << 7)
165 #define WMC_WL (3 << 5)
166 #define WMC_WL_16 (0 << 5)
167 #define WMC_WL_20 (1 << 5)
168 #define WMC_WL_24 (2 << 5)
169 #define WMC_WL_32 (3 << 5)
170 #define WMC_FMT (3 << 3)
171 #define WMC_FMT_RJUST (0 << 3)
172 #define WMC_FMT_LJUST (1 << 3)
173 #define WMC_FMT_I2S (2 << 3)
174 #define WMC_FMT_DSP_PCM (3 << 3)
175 #define WMC_DACLRSWAP (1 << 2)
176 #define WMC_ADCLRSWAP (1 << 1)
177 #define WMC_MONO (1 << 0)
178
179 /* WMC_COMPANDING_CTRL (0x05) */
180 #define WMC_WL8 (1 << 5)
181 #define WMC_DAC_COMP (3 << 3)
182 #define WMC_DAC_COMP_OFF (0 << 3)
183 #define WMC_DAC_COMP_U_LAW (2 << 3)
184 #define WMC_DAC_COMP_A_LAW (3 << 3)
185 #define WMC_ADC_COMP (3 << 1)
186 #define WMC_ADC_COMP_OFF (0 << 1)
187 #define WMC_ADC_COMP_U_LAW (2 << 1)
188 #define WMC_ADC_COMP_A_LAW (3 << 1)
189 #define WMC_LOOPBACK (1 << 0)
190
191 /* WMC_CLOCK_GEN_CTRL (0x06) */
192 #define WMC_CLKSEL (1 << 8)
193 #define WMC_MCLKDIV (7 << 5)
194 #define WMC_MCLKDIV_1 (0 << 5)
195 #define WMC_MCLKDIV_1_5 (1 << 5)
196 #define WMC_MCLKDIV_2 (2 << 5)
197 #define WMC_MCLKDIV_3 (3 << 5)
198 #define WMC_MCLKDIV_4 (4 << 5)
199 #define WMC_MCLKDIV_6 (5 << 5)
200 #define WMC_MCLKDIV_8 (6 << 5)
201 #define WMC_MCLKDIV_12 (7 << 5)
202 #define WMC_BCLKDIV (7 << 2)
203 #define WMC_BCLKDIV_1 (0 << 2)
204 #define WMC_BCLKDIV_2 (1 << 2)
205 #define WMC_BCLKDIV_4 (2 << 2)
206 #define WMC_BCLKDIV_8 (3 << 2)
207 #define WMC_BCLKDIV_16 (4 << 2)
208 #define WMC_BCLKDIV_32 (5 << 2)
209 #define WMC_MS (1 << 0)
210
211 /* WMC_ADDITIONAL_CTRL (0x07) */
212 /* This configure the digital filter coefficients - pick the closest
213 * to what's really being used (greater than or equal). */
214 #define WMC_SR (7 << 1)
215 #define WMC_SR_48KHZ (0 << 1)
216 #define WMC_SR_32KHZ (1 << 1)
217 #define WMC_SR_24KHZ (2 << 1)
218 #define WMC_SR_16KHZ (3 << 1)
219 #define WMC_SR_12KHZ (4 << 1)
220 #define WMC_SR_8KHZ (5 << 1)
221 /* 110-111=reserved */
222 #define WMC_SLOWCLKEN (1 << 0)
223
224 /* WMC_GPIO (0x08) */
225 #define WMC_OPCLKDIV (3 << 4)
226 #define WMC_OPCLKDIV_1 (0 << 4)
227 #define WMC_OPCLKDIV_2 (1 << 4)
228 #define WMC_OPCLKDIV_3 (2 << 4)
229 #define WMC_OPCLKDIV_4 (3 << 4)
230 #define WMC_GPIO1POL (1 << 3)
231 #define WMC_GPIO1SEL (7 << 0)
232 #define WMC_GPIO1SEL_TEMP_OK (2 << 0)
233 #define WMC_GPIO1SEL_AMUTE_ACTIVE (3 << 0)
234 #define WMC_GPIO1SEL_PLL_CLK_OP (4 << 0)
235 #define WMC_GPIO1SEL_PLL_LOCK (5 << 0)
236 #define WMC_GPIO1SEL_LOGIC_1 (6 << 0)
237 #define WMC_GPIO1SEL_LOGIC_0 (7 << 0)
238
239 /* WMC_JACK_DETECT_CONTROL1 (0x09) */
240 #define WMC_JD_VMID (3 << 7)
241 #define WMC_JD_VMID_EN_0 (1 << 7)
242 #define WMC_JD_VMID_EN_1 (2 << 7)
243 #define WMC_JD_EN (1 << 6)
244 #define WMC_JD_SEL (3 << 4)
245 #define WMC_JD_SEL_GPIO1 (0 << 4)
246 #define WMC_JD_SEL_GPIO2 (1 << 4)
247 #define WMC_JD_SEL_GPIO3 (2 << 4)
248
249 /* WMC_DAC_CONTROL (0x0a) */
250 #define WMC_SOFT_MUTE (1 << 6)
251 #define WMC_DACOSR_128 (1 << 3)
252 #define WMC_AMUTE (1 << 2)
253 #define WMC_DACPOLR (1 << 1)
254 #define WMC_DACPOLL (1 << 0)
255
256 /* WMC_LEFT_DAC_DIGITAL_VOL (0x0b) */
257 /* WMC_RIGHT_DAC_DIGITAL_VOL (0x0c) */
258 /* 00000000=mute, 00000001=-127dB...(0.5dB steps)...11111111=0dB */
259 /* Use WMC_DVOL* macros */
260
261 /* WMC_JACK_DETECT_CONTROL2 (0x0d) */
262 #define WMC_JD_EN1 (0xf << 4)
263 #define WMC_OUT1_EN1 (1 << 4)
264 #define WMC_OUT2_EN1 (2 << 4)
265 #define WMC_OUT3_EN1 (4 << 4)
266 #define WMC_OUT4_EN1 (8 << 4)
267 #define WMC_JD_EN0 (0xf << 0)
268 #define WMC_OUT1_EN0 (1 << 0)
269 #define WMC_OUT2_EN0 (2 << 0)
270 #define WMC_OUT3_EN0 (4 << 0)
271 #define WMC_OUT4_EN0 (8 << 0)
272
273 /* WMC_ADC_CONTROL (0x0e) */
274 #define WMC_HPFEN (1 << 8)
275 #define WMC_HPFAPP (1 << 7)
276 #define WMC_HPFCUT (7 << 4)
277 #define WMC_ADCOSR (1 << 3)
278 #define WMC_ADCRPOL (1 << 1)
279 #define WMC_ADCLPOL (1 << 0)
280
281 /* WMC_LEFT_ADC_DIGITAL_VOL (0x0f) */
282 /* WMC_RIGHT_ADC_DITIGAL_VOL (0x10) */
283 /* 0.5dB steps: Mute:0x00, -127dB:0x01...0dB:0xff */
284 /*Use WMC_DVOL* macros */
285
286 /* Gain */
287 #define WMC_EQG (0x1f << 0)
288
289 /* Cutoff/Center */
290 #define WMC_EQC (0x3 << 5)
291 #define WMC_EQC_POS (5)
292
293 /* Bandwidth */
294 #define WMC_EQBW (1 << 8)
295
296 /* WMC_EQ1_LOW_SHELF (0x12) */
297 #define WMC_EQ3DMODE (1 << 8)
298 #define WMC_EQ1C_80HZ (0 << 5) /* 80Hz */
299 #define WMC_EQ1C_105HZ (1 << 5) /* 105Hz */
300 #define WMC_EQ1C_135HZ (2 << 5) /* 135Hz */
301 #define WMC_EQ1C_175HZ (3 << 5) /* 175Hz */
302 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB, 11001-11111=reserved */
303
304 /* WMC_EQ2_PEAK1 (0x13) */
305 #define WMC_EQ2C_230HZ (0 << 5) /* 230Hz */
306 #define WMC_EQ2C_300HZ (1 << 5) /* 300Hz */
307 #define WMC_EQ2C_385HZ (2 << 5) /* 385Hz */
308 #define WMC_EQ2C_500HZ (3 << 5) /* 500Hz */
309 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
310 11001-11111=reserved */
311
312 /* WMC_EQ3_PEAK2 (0x14) */
313 #define WMC_EQ3C_650HZ (0 << 5) /* 650Hz */
314 #define WMC_EQ3C_850HZ (1 << 5) /* 850Hz */
315 #define WMC_EQ3C_1_1KHZ (2 << 5) /* 1.1kHz */
316 #define WMC_EQ3C_1_4KHZ (3 << 5) /* 1.4kHz */
317 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
318 11001-11111=reserved */
319
320 /* WMC_EQ4_PEAK3 (0x15) */
321 #define WMC_EQ4C_1_8KHZ (0 << 5) /* 1.8kHz */
322 #define WMC_EQ4C_2_4KHZ (1 << 5) /* 2.4kHz */
323 #define WMC_EQ4C_3_2KHZ (2 << 5) /* 3.2kHz */
324 #define WMC_EQ4C_4_1KHZ (3 << 5) /* 4.1kHz */
325 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
326 11001-11111=reserved */
327
328 /* WMC_EQ5_HIGH_SHELF (0x16) */
329 #define WMC_EQ5C_5_3KHZ (0 << 5) /* 5.3kHz */
330 #define WMC_EQ5C_6_9KHZ (1 << 5) /* 6.9kHz */
331 #define WMC_EQ5C_9KHZ (2 << 5) /* 9.0kHz */
332 #define WMC_EQ5C_11_7KHZ (3 << 5) /* 11.7kHz */
333 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB,
334 11001-11111=reserved */
335
336 /* WMC_DAC_LIMITER1 (0x18) */
337 #define WMC_LIMEN (1 << 8)
338 /* 0000=750uS, 0001=1.5mS...(x2 each step)...1010-1111=768mS */
339 #define WMC_LIMDCY (0xf << 4)
340 #define WMC_LIMDCY_POS (4)
341 /* 0000=94uS, 0001=188uS...(x2 each step)...1011-1111=192mS */
342 #define WMC_LIMATK (0xf << 0)
343
344 /* WMC_DAC_LIMITER2 (0x19) */
345 /* 000=-1dB, 001=-2dB...(-1dB steps)...101-111:-6dB */
346 #define WMC_LIMLVL (7 << 4)
347 #define WMC_LIMLVL_POS (4)
348 /* 0000=0dB, 0001=+1dB...1100=+12dB, 1101-1111=reserved */
349 #define WMC_LIMBOOST (0xf << 0)
350
351 /* Generic notch filter bits and macros */
352 #define WMC_NFU (1 << 8)
353 #define WMC_NFA (0x7f << 0)
354
355 /* WMC_NOTCH_FILTER1 (0x1b) */
356 #define WMC_NFEN (1 << 7)
357 /* WMC_NOTCH_FILTER2 (0x1c) */
358 /* WMC_NOTCH_FILTER3 (0x1d) */
359 /* WMC_NOTCH_FILTER4 (0x1e) */
360
361 /* WMC_ALC_CONTROL1 (0x20) */
362 #define WMC_ALCSEL (3 << 7)
363 #define WMC_ALCSEL_OFF (0 << 7)
364 #define WMC_ALCSEL_RIGHT_ONLY (1 << 7)
365 #define WMC_ALCSEL_LEFT_ONLY (2 << 7)
366 #define WMC_ALCSEL_BOTH_ON (3 << 7)
367 /* 000=-6.75dB, 001=-0.75dB...(6dB steps)...111=+35.25dB */
368 #define WMC_ALCMAXGAIN (7 << 3)
369 #define WMC_ALCMAXGAIN_POS (3)
370 /* 000:-12dB...(6dB steps)...111:+30dB */
371 #define WMC_ALCMINGAIN (7 << 0)
372
373 /* WMC_ALC_CONTROL2 (0x21) */
374 /* 0000=0ms, 0001=2.67ms, 0010=5.33ms...
375 (2x with every step)...43.691s */
376 #define WMC_ALCHLD (0xf << 4)
377 #define WMC_ALCHLD_POS (4)
378 /* 1111:-1.5dBFS, 1110:-1.5dBFS, 1101:-3dBFS, 1100:-4.5dBFS...
379 (-1.5dB steps)...0001:-21dBFS, 0000:-22.5dBFS */
380 #define WMC_ALCLVL (0xf << 0)
381
382 /* WMC_ALC_CONTROL3 (0x22) */
383 #define WMC_ALCMODE (1 << 8)
384 #define WMC_ALCDCY (0xf << 4)
385 #define WMC_ALCATK (0xf << 0)
386
387 /* WMC_NOISE_GATE (0x23) */
388 #define WMC_NGEN (1 << 3)
389 /* 000=-39dB, 001=-45dB, 010=-51dB...(6dB steps)...111=-81dB */
390 #define WMC_NGTH (7 << 0)
391
392 /* WMC_PLL_N (0x24) */
393 #define WMC_PLL_PRESCALE (1 << 4)
394 #define WMC_PLLN (0xf << 0)
395
396 /* WMC_PLL_K1 (0x25) */
397 #define WMC_PLLK_23_18 (0x3f << 0)
398
399 /* WMC_PLL_K2 (0x26) */
400 #define WMC_PLLK_17_9 (0x1ff << 0)
401
402 /* WMC_PLL_K3 (0x27) */
403 #define WMC_PLLK_8_0 (0x1ff << 0)
404
405 /* WMC_3D_CONTROL (0x29) */
406 /* 0000: 0%, 0001: 6.67%...1110: 93.3%, 1111: 100% */
407 #define WMC_DEPTH3D (0xf << 0)
408
409 /* WMC_BEEP_CONTROL (0x2b) */
410 #define WMC_MUTERPGA2INV (1 << 5)
411 #define WMC_INVROUT2 (1 << 4)
412 /* 000=-15dB, 001=-12dB...111=+6dB */
413 #define WMC_BEEPVOL (7 << 1)
414 #define WMC_BEEPVOL_POS (1)
415 #define WMC_BEEPEN (1 << 0)
416
417 /* WMC_INPUT_CTRL (0x2c) */
418 #define WMC_MBVSEL (1 << 8)
419 #define WMC_R2_2INPPGA (1 << 6)
420 #define WMC_RIN2INPPGA (1 << 5)
421 #define WMC_RIP2INPPGA (1 << 4)
422 #define WMC_L2_2INPPGA (1 << 2)
423 #define WMC_LIN2INPPGA (1 << 1)
424 #define WMC_LIP2INPPGA (1 << 0)
425
426 /* WMC_LEFT_INP_PGA_GAIN_CTRL (0x2d) */
427 /* 000000=-12dB, 000001=-11.25dB...010000=0dB, 111111=+35.25dB */
428 /* Uses WMC_AVOL* macros */
429
430 /* WMC_RIGHT_INP_PGA_GAIN_CTRL (0x2e) */
431 /* 000000=-12dB, 000001=-11.25dB...010000=0dB, 111111=+35.25dB */
432 /* Uses WMC_AVOL* macros */
433
434 /* WMC_LEFT_ADC_BOOST_CTRL (0x2f) */
435 #define WMC_PGABOOSTL (1 << 8)
436 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
437 #define WMC_L2_2BOOSTVOL (7 << 4)
438 #define WMC_L2_2BOOSTVOL_POS (4)
439 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
440 #define WMC_AUXL2BOOSTVOL (7 << 0)
441
442 /* WMC_RIGHT_ADC_BOOST_CTRL (0x30) */
443 #define WMC_PGABOOSTR (1 << 8)
444 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
445 #define WMC_R2_2BOOSTVOL (7 << 4)
446 #define WMC_R2_2BOOSTVOL_POS (4)
447 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
448 #define WMC_AUXR2BOOSTVOL (7 << 0)
449
450 /* WMC_OUTPUT_CTRL (0x31) */
451 #define WMC_DACL2RMIX (1 << 6)
452 #define WMC_DACR2LMIX (1 << 5)
453 #define WMC_OUT4BOOST (1 << 4)
454 #define WMC_OUT3BOOST (1 << 3)
455 #define WMC_SPKBOOST (1 << 2)
456 #define WMC_TSDEN (1 << 1)
457 #define WMC_VROI (1 << 0)
458
459 /* WMC_LEFT_MIXER_CTRL (0x32) */
460 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
461 #define WMC_AUXLMIXVOL (7 << 6)
462 #define WMC_AUXLMIXVOL_POS (6)
463 #define WMC_AUXL2LMIX (1 << 5)
464 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
465 #define WMC_BYPLMIXVOL (7 << 2)
466 #define WMC_BYPLMIXVOL_POS (2)
467 #define WMC_BYPL2LMIX (1 << 1)
468 #define WMC_DACL2LMIX (1 << 0)
469
470 /* WMC_RIGHT_MIXER_CTRL (0x33) */
471 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
472 #define WMC_AUXRMIXVOL (7 << 6)
473 #define WMC_AUXRMIXVOL_POS (6)
474 #define WMC_AUXR2RMIX (1 << 5)
475 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
476 #define WMC_BYPRMIXVOL (7 << 2)
477 #define WMC_BYPRMIXVOL_POS (2)
478 #define WMC_BYPR2RMIX (1 << 1)
479 #define WMC_DACR2RMIX (1 << 0)
480
481 /* WMC_LOUT1_HP_VOLUME_CTRL (0x34) */
482 /* WMC_ROUT1_HP_VOLUME_CTRL (0x35) */
483 /* WMC_LOUT2_SPK_VOLUME_CTRL (0x36) */
484 /* WMC_ROUT2_SPK_VOLUME_CTRL (0x37) */
485 /* 000000=-57dB...111001=0dB...111111=+6dB */
486 /* Uses WMC_AVOL* macros */
487
488 /* WMC_OUT3_MIXER_CTRL (0x38) */
489 #define WMC_OUT42OUT3 (1 << 3)
490 #define WMC_BYPL2OUT3 (1 << 2)
491 #define WMC_LMIX2OUT3 (1 << 1)
492 #define WMC_LDAC2OUT3 (1 << 0)
493
494 /* WMC_OUT4_MONO_MIXER_CTRL (0x39) */
495 #define WMC_HALFSIG (1 << 5)
496 #define WMC_LMIX2OUT4 (1 << 4)
497 #define WMC_LDAC2OUT4 (1 << 3)
498 #define WMC_BYPR2OUT4 (1 << 2)
499 #define WMC_RMIX2OUT4 (1 << 1)
500 #define WMC_RDAC2OUT4 (1 << 0)
501
502 /* For implementing samplerate conrol */
503 struct wmc_srctrl_entry
504 {
505 uint32_t plln : 8;
506 uint32_t pllk1 : 6;
507 uint32_t pllk2 : 9;
508 uint32_t pllk3 : 9;
509 unsigned char mclkdiv;
510 unsigned char filter;
511 };
512
513 #endif /* _WM8978_H */
thomasjfox's rockbox modifications (mameo port)