RTC s35380a - fix initialization.
[maemo-rb.git] / firmware / drivers / rtc / rtc_s35380a.c
blob28b843a60ab11836ea3ffa82728c77434607b664
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * adopted for HD300 by Marcin Bukat
11 * Copyright (C) 2009 by Bertrik Sikken
12 * Copyright (C) 2008 by Robert Kukla
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
22 ****************************************************************************/
23 #include "config.h"
24 #include "rtc.h"
25 #include "i2c-coldfire.h"
27 /* Driver for the Seiko S35380A real-time clock chip with i2c interface
29 This driver was derived from rtc_s3539a.c and adapted for the MPIO HD300
32 #define RTC_ADDR 0x60
34 #define STATUS_REG1 0
35 #define STATUS_REG2 1
36 #define REALTIME_DATA1 2
37 #define REALTIME_DATA2 3
38 #define INT1_REG 4
39 #define INT2_REG 5
40 #define CLOCK_CORR_REG 6
41 #define FREE_REG 7
43 /* STATUS_REG1 flags
44 * bits order is reversed
46 #define STATUS_REG1_POC 0x01
47 #define STATUS_REG1_BLD 0x02
48 #define STATUS_REG1_INT2 0x04
49 #define STATUS_REG1_INT1 0x08
50 #define STATUS_REG1_SC1 0x10
51 #define STATUS_REG1_SC0 0x20
52 #define STATUS_REG1_H1224 0x40
53 #define STATUS_REG1_RESET 0x80
56 static void reverse_bits(unsigned char* v, int size)
58 static const unsigned char flipnibble[] =
59 {0x00, 0x08, 0x04, 0x0C, 0x02, 0x0A, 0x06, 0x0E,
60 0x01, 0x09, 0x05, 0x0D, 0x03, 0x0B, 0x07, 0x0F};
61 int i;
63 for (i = 0; i < size; i++) {
64 v[i] = (flipnibble[v[i] & 0x0F] << 4) |
65 flipnibble[(v[i] >> 4) & 0x0F];
69 void rtc_init(void)
71 unsigned char status_reg;
72 i2c_read(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
74 if ( (status_reg & STATUS_REG1_POC) ||
75 (status_reg & STATUS_REG1_BLD) )
77 /* perform rtc reset*/
78 status_reg |= STATUS_REG1_RESET;
79 i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
82 /* setup 24h time format */
83 status_reg = STATUS_REG1_H1224;
84 i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
87 int rtc_read_datetime(struct tm *tm)
89 unsigned char buf[7];
90 unsigned int i;
91 int ret;
93 ret = i2c_read(I2C_IFACE_1, RTC_ADDR | (REALTIME_DATA1<<1), buf, sizeof(buf));
94 reverse_bits(buf, sizeof(buf));
96 buf[4] &= 0x3f; /* mask out p.m. flag */
98 for (i = 0; i < sizeof(buf); i++)
99 buf[i] = BCD2DEC(buf[i]);
101 tm->tm_sec = buf[6];
102 tm->tm_min = buf[5];
103 tm->tm_hour = buf[4];
104 tm->tm_wday = buf[3];
105 tm->tm_mday = buf[2];
106 tm->tm_mon = buf[1] - 1;
107 tm->tm_year = buf[0] + 100;
109 return ret;
112 int rtc_write_datetime(const struct tm *tm)
114 unsigned char buf[7];
115 unsigned int i;
116 int ret;
118 buf[6] = tm->tm_sec;
119 buf[5] = tm->tm_min;
120 buf[4] = tm->tm_hour;
121 buf[3] = tm->tm_wday;
122 buf[2] = tm->tm_mday;
123 buf[1] = tm->tm_mon + 1;
124 buf[0] = tm->tm_year - 100;
126 for (i = 0; i < sizeof(buf); i++)
127 buf[i] = DEC2BCD(buf[i]);
129 reverse_bits(buf, sizeof(buf));
130 ret = i2c_write(I2C_IFACE_1, RTC_ADDR | (REALTIME_DATA1<<1), buf, sizeof(buf));
132 return ret;