firmware/export/wm8758.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2005 by Dave Chapman
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #ifndef _WM8758_H
  23 #define _WM8758_H
  24
  25 /* volume/balance/treble/bass interdependency */
  26 #define VOLUME_MIN -890
  27 #define VOLUME_MAX  60
  28
  29 #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | BASS_CUTOFF_CAP | TREBLE_CUTOFF_CAP)
  30
  31 extern int tenthdb2master(int db);
  32 extern int tenthdb2mixer(int db);
  33
  34 extern void audiohw_set_master_vol(int vol_l, int vol_r);
  35 extern void audiohw_set_lineout_vol(int vol_l, int vol_r);
  36 extern void audiohw_set_mixer_vol(int channel1, int channel2);
  37 extern void audiohw_enable_lineout(bool enable);
  38
  39 #define RESET                   0x00
  40 #define RESET_RESET             0x0
  41
  42 #define PWRMGMT1                0x01 /* default 000 */
  43 #define PWRMGMT1_VMIDSEL_OFF    (0 << 0)
  44 #define PWRMGMT1_VMIDSEL_100K   (1 << 0)
  45 #define PWRMGMT1_VMIDSEL_500K   (2 << 0)
  46 #define PWRMGMT1_VMIDSEL_10K    (3 << 0)
  47 #define PWRMGMT1_BUFIOEN        (1 << 2)
  48 #define PWRMGMT1_BIASEN         (1 << 3)
  49 #define PWRMGMT1_MICBEN         (1 << 4)
  50 #define PWRMGMT1_PLLEN          (1 << 5)
  51 #define PWRMGMT1_OUT3MIXEN      (1 << 6)
  52 #define PWRMGMT1_OUT4MIXEN      (1 << 7)
  53
  54 #define PWRMGMT2                0x02 /* default 000 */
  55 #define PWRMGMT2_ADCENL         (1 << 0)
  56 #define PWRMGMT2_ADCENR         (1 << 1)
  57 #define PWRMGMT2_INPGAENL       (1 << 2)
  58 #define PWRMGMT2_INPGAENR       (1 << 3)
  59 #define PWRMGMT2_BOOSTENL       (1 << 4)
  60 #define PWRMGMT2_BOOSTENR       (1 << 5)
  61 #define PWRMGMT2_SLEEP          (1 << 6)
  62 #define PWRMGMT2_LOUT1EN        (1 << 7)
  63 #define PWRMGMT2_ROUT1EN        (1 << 8)
  64
  65 #define PWRMGMT3                0x03 /* default 000 */
  66 #define PWRMGMT3_DACENL         (1 << 0)
  67 #define PWRMGMT3_DACENR         (1 << 1)
  68 #define PWRMGMT3_LMIXEN         (1 << 2)
  69 #define PWRMGMT3_RMIXEN         (1 << 3)
  70 #define PWRMGMT3_ROUT2EN        (1 << 5)
  71 #define PWRMGMT3_LOUT2EN        (1 << 6)
  72 #define PWRMGMT3_OUT3EN         (1 << 7)
  73 #define PWRMGMT3_OUT4EN         (1 << 8)
  74
  75 #define AINTFCE                 0x04 /* default 050 */
  76 #define AINTFCE_MONO            (1 << 0)
  77 #define AINTFCE_ALRSWAP         (1 << 1)
  78 #define AINTFCE_DLRSWAP         (1 << 2)
  79 #define AINTFCE_FORMAT_MSB_RJUST (0 << 3)
  80 #define AINTFCE_FORMAT_MSB_LJUST (1 << 3)
  81 #define AINTFCE_FORMAT_I2S      (2 << 3) /* default */
  82 #define AINTFCE_FORMAT_DSP      (3 << 3)
  83 #define AINTFCE_FORMAT_MASK     (3 << 3)
  84 #define AINTFCE_IWL_16BIT       (0 << 5)
  85 #define AINTFCE_IWL_20BIT       (1 << 5)
  86 #define AINTFCE_IWL_24BIT       (2 << 5) /* default */
  87 #define AINTFCE_IWL_32BIT       (3 << 5)
  88 #define AINTFCE_IWL_MASK        (3 << 5)
  89 #define AINTFCE_LRP             (1 << 7)
  90 #define AINTFCE_BCP             (1 << 8)
  91
  92 #define COMPCTRL                0x05 /* default 000 unused */
  93
  94 #define CLKCTRL                 0x06 /* default 140 */
  95 #define CLKCTRL_MS              (1 << 0)
  96 #define CLKCTRL_BCLKDIV_1       (0 << 2)
  97 #define CLKCTRL_BCLKDIV_2       (1 << 2)
  98 #define CLKCTRL_BCLKDIV_4       (2 << 2)
  99 #define CLKCTRL_BCLKDIV_8       (3 << 2)
 100 #define CLKCTRL_BCLKDIV_16      (4 << 2)
 101 #define CLKCTRL_BCLKDIV_32      (5 << 2)
 102 #define CLKCTRL_MCLKDIV_1       (0 << 5)
 103 #define CLKCTRL_MCLKDIV_1_5     (1 << 5)
 104 #define CLKCTRL_MCLKDIV_2       (2 << 5) /* default */
 105 #define CLKCTRL_MCLKDIV_3       (3 << 5)
 106 #define CLKCTRL_MCLKDIV_4       (4 << 5)
 107 #define CLKCTRL_MCLKDIV_6       (5 << 5)
 108 #define CLKCTRL_MCLKDIV_8       (6 << 5)
 109 #define CLKCTRL_MCLKDIV_12      (7 << 5)
 110 #define CLKCTRL_MCLKDIV_MASK    (7 << 5)
 111 #define CLKCTRL_CLKSEL          (1 << 8) /* default */
 112
 113 #define ADDCTRL                 0x07 /* default 000 */
 114 #define ADDCTRL_SLOWCLKEN       (1 << 0)
 115 #define ADDCTRL_SR_48kHz        (0 << 1)
 116 #define ADDCTRL_SR_32kHz        (1 << 1)
 117 #define ADDCTRL_SR_24kHz        (2 << 1)
 118 #define ADDCTRL_SR_16kHz        (3 << 1)
 119 #define ADDCTRL_SR_12kHz        (4 << 1)
 120 #define ADDCTRL_SR_8kHz         (5 << 1)
 121 #define ADDCTRL_SR_MASK         (7 << 1)
 122 #define ADDCTRL_M128ENB         (1 << 8)
 123
 124 #define GPIOCTRL                0x08 /* default 000 unused */
 125 #define JACKDETECTCTRL1         0x09 /* default 000 unused */
 126
 127 #define DACCTRL                 0x0a /* default 000 */
 128 #define DACCTRL_DACLPOL         (1 << 0)
 129 #define DACCTRL_DACRPOL         (1 << 1)
 130 #define DACCTRL_AMUTE           (1 << 2)
 131 #define DACCTRL_DACOSR128       (1 << 3)
 132 #define DACCTRL_SOFTMUTE        (1 << 6)
 133
 134 #define LDACVOL                 0x0b /* default 0ff */
 135 #define LDACVOL_MASK            0xff
 136 #define LDACVOL_DACVU           (1 << 8)
 137
 138 #define RDACVOL                 0x0c /* default 0ff */
 139 #define RDACVOL_MASK            0xff
 140 #define RDACVOL_DACVU           (1 << 8)
 141
 142 #define JACKDETECTCTRL2         0x0d /* default 000 unused */
 143
 144 #define ADCCTRL                 0x0e /* default 100 */
 145 #define ADCCTRL_ADCLPOL         (1 << 0)
 146 #define ADCCTRL_ADCRPOL         (1 << 1)
 147 #define ADCCTRL_ADCOSR128       (1 << 3)
 148 #define ADCCTRL_HPFCUT_MASK     (7 << 4)
 149 #define ADCCTRL_HPFAPP          (1 << 7)
 150 #define ADCCTRL_HPFEN           (1 << 8) /* default */
 151
 152 #define LADCVOL                 0x0f /* default 0ff */
 153 #define LADCVOL_MASK            0xff
 154 #define LADCVOL_ADCVU           (1 << 8)
 155
 156 #define RADCVOL                 0x10 /* default 0ff */
 157 #define RADCVOL_MASK            0xff
 158 #define RADCVOL_ADCVU           (1 << 8)
 159
 160 #define EQ1                     0x12 /* default 12c */
 161 #define EQ2                     0x13 /* default 02c */
 162 #define EQ3                     0x14 /* default 02c */
 163 #define EQ4                     0x15 /* default 02c */
 164 #define EQ5                     0x16 /* default 02c */
 165 /* note: WM8758 curruently runs on low power mode. 3 peaking filters
 166  * and 3D will work when M128ENB is enabled + proper code. */
 167 #define EQ1_EQ3DMODE            (1 << 8) /* default */
 168 #define EQ_GAIN_MASK            0x1f
 169 #define EQ_CUTOFF_MASK          (3 << 5)
 170 #define EQ_GAIN_VALUE(x)        (((-x) + 12) & 0x1f)
 171 #define EQ_CUTOFF_VALUE(x)      ((((x) - 1) & 0x03) << 5)
 172
 173 #define DACLIMITER1             0x18 /* default 032 unused */
 174 #define DACLIMITER2             0x19 /* default 000 unused */
 175 #define NOTCHFILTER1            0x1b /* default 000 unused */
 176 #define NOTCHFILTER2            0x1c /* default 000 unused */
 177 #define NOTCHFILTER3            0x1d /* default 000 unused */
 178 #define NOTCHFILTER4            0x1e /* default 000 unused */
 179 #define ALCCONTROL1             0x20 /* default 038 unused */
 180 #define ALCCONTROL2             0x21 /* default 00b unused */
 181 #define ALCCONTROL3             0x22 /* default 032 unused */
 182 #define NOISEGATE               0x23 /* default 000 unused */
 183
 184 #define PLLN                    0x24 /* default 008 */
 185 #define PLLN_PLLN_MASK          0x0f
 186 #define PLLN_PLLPRESCALE        (1 << 4)
 187
 188 #define PLLK1                   0x25 /* default 00c */
 189 #define PLLK1_MASK              0x3f
 190
 191 #define PLLK2                   0x26 /* default 093 */
 192 #define PLLK3                   0x27 /* default 0e9 */
 193
 194 #define THREEDCTRL              0x29 /* default 000 */
 195 #define THREEDCTRL_DEPTH3D_MASK 0x0f
 196
 197 #define OUT4TOADC               0x2a /* default 000 */
 198 #define OUT4TOADC_OUT1DEL       (1 << 0)
 199 #define OUT4TOADC_DELEN         (1 << 1)
 200 #define OUT4TOADC_POBCTRL       (1 << 2)
 201 #define OUT4TOADC_OUT2DEL       (1 << 3)
 202 #define OUT4TOADC_VMIDTOG       (1 << 4)
 203 #define OUT4TOADC_OUT4_2LNR     (1 << 5)
 204 #define OUT4TOADC_OUT4_ADCVOL_MASK (7 << 6)
 205
 206 #define BEEPCTRL                0x2b /* default 000 */
 207 #define BEEPCTRL_DELEN2         (1 << 2)
 208 #define BEEPCTRL_BYPR2LMIX      (1 << 7)
 209 #define BEEPCTRL_BYPL2RMIX      (1 << 8)
 210
 211 #define INCTRL                  0x2c /* default 003 */
 212 #define INCTRL_LIP2INPGA        (1 << 0) /* default */
 213 #define INCTRL_LIN2INPGA        (1 << 1) /* default */
 214 #define INCTRL_L2_2INPGA        (1 << 2)
 215 #define INCTRL_RIP2INPGA        (1 << 4)
 216 #define INCTRL_RIN2INPGA        (1 << 5)
 217 #define INCTRL_R2_2INPGA        (1 << 6)
 218 #define INCTRL_MBVSEL           (1 << 8)
 219
 220 #define LINPGAVOL               0x2d /* default 010 */
 221 #define LINPGAVOL_INPGAVOL_MASK 0x3f
 222 #define LINPGAVOL_INPGAMUTEL    (1 << 6)
 223 #define LINPGAVOL_INPGAZCL      (1 << 7)
 224 #define LINPGAVOL_INPGAVU       (1 << 8)
 225
 226 #define RINPGAVOL               0x2e /* default 010 */
 227 #define RINPGAVOL_INPGAVOL_MASK 0x3f
 228 #define RINPGAVOL_INPGAMUTER    (1 << 6)
 229 #define RINPGAVOL_INPGAZCR      (1 << 7)
 230 #define RINPGAVOL_INPGAVU       (1 << 8)
 231
 232 #define LADCBOOST               0x2f /* default 100 */
 233 #define LADCBOOST_L2_2BOOST_MASK  (7 << 4)
 234 #define LADCBOOST_L2_2BOOST(x)  ((x) << 4)
 235 #define LADCBOOST_PGABOOSTL     (1 << 8) /* default */
 236
 237 #define RADCBOOST               0x30 /* default 100 */
 238 #define RADCBOOST_R2_2BOOST_MASK  (7 << 4)
 239 #define RADCBOOST_R2_2BOOST(x)  ((x) << 4)
 240 #define RADCBOOST_PGABOOSTR     (1 << 8) /* default */
 241
 242 #define OUTCTRL                 0x31 /* default 002 */
 243 #define OUTCTRL_VROI            (1 << 0)
 244 #define OUTCTRL_TSDEN           (1 << 1) /* default */
 245 #define OUTCTRL_TSOPCTRL        (1 << 2)
 246 #define OUTCTRL_OUT3ENDEL       (1 << 3)
 247 #define OUTCTRL_OUT4ENDEL       (1 << 4)
 248 #define OUTCTRL_DACR2LMIX       (1 << 5)
 249 #define OUTCTRL_DACL2RMIX       (1 << 6)
 250 #define OUTCTRL_LINE_COM        (1 << 7)
 251 #define OUTCTRL_HP_COM          (1 << 8)
 252
 253 #define LOUTMIX                 0x32 /* default 001 */
 254 #define LOUTMIX_DACL2LMIX       (1 << 0) /* default */
 255 #define LOUTMIX_BYPL2LMIX       (1 << 1)
 256 #define LOUTMIX_BYP2LMIXVOL_MASK (7 << 2)
 257 #define LOUTMIX_BYP2LMIXVOL(x)  ((x) << 2)
 258
 259 #define ROUTMIX                 0x33 /* default 001 */
 260 #define ROUTMIX_DACR2RMIX       (1 << 0) /* default */
 261 #define ROUTMIX_BYPR2RMIX       (1 << 1)
 262 #define ROUTMIX_BYP2RMIXVOL_MASK (7 << 2)
 263 #define ROUTMIX_BYP2RMIXVOL(x)  ((x) << 2)
 264
 265 #define LOUT1VOL                0x34 /* default 039 */
 266 #define LOUT1VOL_MASK           0x3f
 267 #define LOUT1VOL_LOUT1MUTE      (1 << 6)
 268 #define LOUT1VOL_LOUT1ZC        (1 << 7)
 269 #define LOUT1VOL_OUT1VU         (1 << 8)
 270
 271 #define ROUT1VOL                0x35 /* default 039 */
 272 #define ROUT1VOL_MASK           0x3f
 273 #define ROUT1VOL_ROUT1MUTE      (1 << 6)
 274 #define ROUT1VOL_ROUT1ZC        (1 << 7)
 275 #define ROUT1VOL_OUT1VU         (1 << 8)
 276
 277 #define LOUT2VOL                0x36 /* default 039 */
 278 #define LOUT2VOL_MASK           0x3f
 279 #define LOUT2VOL_LOUT2MUTE      (1 << 6)
 280 #define LOUT2VOL_LOUT2ZC        (1 << 7)
 281 #define LOUT2VOL_OUT2VU         (1 << 8)
 282
 283 #define ROUT2VOL                0x37 /* default 039 */
 284 #define ROUT2VOL_MASK           0x3f
 285 #define ROUT2VOL_ROUT2MUTE      (1 << 6)
 286 #define ROUT2VOL_ROUT2ZC        (1 << 7)
 287 #define ROUT2VOL_OUT2VU         (1 << 8)
 288
 289 #define OUT3MIX                 0x38 /* default 001 */
 290 #define OUT3MIX_LDAC2OUT3       (1 << 0) /* default */
 291 #define OUT3MIX_LMIX2OUT3       (1 << 1)
 292 #define OUT3MIX_BYPL2OUT3       (1 << 2)
 293 #define OUT3MIX_OUT4_2OUT3      (1 << 3)
 294 #define OUT3MIX_OUT3MUTE        (1 << 6)
 295
 296 #define OUT4MIX                 0x39 /* default 001 */
 297 #define OUT4MIX_RDAC2OUT4       (1 << 0) /* default */
 298 #define OUT4MIX_RMIX2OUT4       (1 << 1)
 299 #define OUT4MIX_BYPR2OUT4       (1 << 2)
 300 #define OUT4MIX_LDAC2OUT4       (1 << 3)
 301 #define OUT4MIX_LMIX2OUT4       (1 << 4)
 302 #define OUT4MIX_OUT4ATTN        (1 << 5)
 303 #define OUT4MIX_OUT4MUTE        (1 << 6)
 304 #define OUT4MIX_OUT3_2OUT4      (1 << 7)
 305
 306 #define BIASCTRL                0x3d /* default 000 */
 307 #define BIASCTRL_HALFOPBIAS     (1 << 0)
 308 #define BIASCTRL_HALFI_IPGA     (1 << 6)
 309 #define BIASCTRL_BIASCUT        (1 << 8)
 310
 311 /* Dummy definition, to be removed when the audio driver API gets reworked. */
 312 #define WM8758_44100HZ     0
 313
 314 #endif /* _WM8758_H */