3 /* These output formats should be in the config-files */
6 OUTPUT_FORMAT(elf32-m68k)
8 OUTPUT_FORMAT(elf32-littlearm)
10 OUTPUT_FORMAT(elf32-sh)
11 #elif defined(CPU_MIPS)
12 OUTPUT_FORMAT(elf32-littlemips)
14 /* We can have an #error here we don't use this file when build sims! */
15 #error Unknown CPU architecture
19 #define STUBOFFSET 0x10000
26 #define NOCACHE_BASE 0x10000000
28 #define NOCACHE_BASE 0x28000000
30 #define CACHEALIGN_SIZE 16
34 /* Default to no offset if target doesn't define this */
35 #define NOCACHE_BASE 0x00000000
38 #if CONFIG_CPU==DM320 || CONFIG_CPU==IMX31L
39 /* Give this 1 meg to allow it to align to the MMU boundary */
41 #ifndef LCD_NATIVE_WIDTH
42 #define LCD_NATIVE_WIDTH LCD_WIDTH
45 #ifndef LCD_NATIVE_HEIGHT
46 #define LCD_NATIVE_HEIGHT LCD_HEIGHT
49 #define LCD_FUDGE LCD_NATIVE_WIDTH%32
50 #define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
51 #define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
53 #define LCD_TTB_AREA 0x100000
56 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
58 #elif CONFIG_CPU==S3C2440
60 /* must be 16Kb (0x4000) aligned */
61 #define TTB_SIZE (0x4000)
62 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
64 #elif CONFIG_CPU==AS3525
66 #define DRAMORIG DRAM_ORIG
68 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE)
70 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
74 /* default to full RAM (minus codecs&plugins) unless specified otherwise */
76 #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
80 #if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
84 #if defined(ARCH_IRIVER) || defined(IAUDIO_M3)
85 #define DRAMORIG 0x31000000
86 #define IRAMORIG 0x1000c000
87 #define IRAMSIZE 0xc000
89 #elif defined(IAUDIO_X5) || defined(IAUDIO_M5)
90 #define DRAMORIG 0x31000000
91 #define IRAMORIG 0x10010000
92 #define IRAMSIZE 0x10000
94 #elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
95 /* PP5022/24 have 128KB of IRAM */
96 #define DRAMORIG 0x00000000
97 #define IRAMORIG 0x4000c000
98 #define IRAMSIZE 0x14000
100 #elif defined(CPU_PP)
101 /* all other PP's have 96KB of IRAM */
102 #define DRAMORIG 0x00000000
103 #define IRAMORIG 0x4000c000
104 #define IRAMSIZE 0x0c000
106 #elif CONFIG_CPU == PNX0101
107 #define DRAMORIG 0xc00000 + STUBOFFSET
108 #define IRAMORIG 0x407000
109 #define IRAMSIZE 0x9000
111 #elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
112 #define DRAMORIG 0x0 + STUBOFFSET
116 #elif CONFIG_CPU==DM320
117 #define DRAMORIG 0x00900000 + STUBOFFSET
119 /* The bit of IRAM that is available is used in the core */
122 #elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
123 #define DRAMORIG 0x20000000
124 /*#define IRAMORIG 0x1000c000
125 #define IRAMSIZE 0xc000*/
129 #elif CONFIG_CPU==AS3525
131 #define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
132 #define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
133 #define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
135 #define IRAMORIG (IRAM_ORIG + 0x20000)
136 #define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
139 #elif CONFIG_CPU == JZ4732
140 #define DRAMORIG 0x80004000 + STUBOFFSET
141 //#define IRAMORIG 0x80000000
142 //#define IRAMSIZE 0x4000
144 #define DRAMORIG 0x09000000 + STUBOFFSET
147 #define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
150 #ifndef CODEC_ORIGIN /* targets can specify another origin */
151 #define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
154 #ifndef PLUGIN_ORIGIN /* targets can specify another origin */
155 #define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
159 #define THIS_LENGTH CODEC_SIZE
160 #define THIS_ORIGIN CODEC_ORIGIN
161 #elif defined OVERLAY_OFFSET
162 #define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
163 #define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
165 #define THIS_LENGTH PLUGIN_LENGTH
166 #define THIS_ORIGIN PLUGIN_ORIGIN
171 PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
172 #if defined(IRAMSIZE) && IRAMSIZE != 0
173 PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
180 _plugin_start_addr = .;
181 plugin_start_addr = .;
188 #if defined(IRAMSIZE) && IRAMSIZE == 0
200 #if defined(IRAMSIZE) && IRAMSIZE == 0
209 #if defined(IRAMSIZE) && IRAMSIZE == 0
214 #if NOCACHE_BASE != 0
215 .ncdata . + NOCACHE_BASE :
217 . = ALIGN(CACHEALIGN_SIZE);
219 . = ALIGN(CACHEALIGN_SIZE);
223 #if defined(IRAMSIZE)
224 iramcopy = . - NOCACHE_BASE;
235 #if defined(IRAMSIZE) && IRAMSIZE != 0
236 .iram IRAMORIG : AT ( iramcopy)
257 plugin_bss_start = .;
259 #if defined(IRAMSIZE) && IRAMSIZE == 0
266 #if NOCACHE_BASE != 0
267 .ncbss . + NOCACHE_BASE (NOLOAD) :
269 . = ALIGN(CACHEALIGN_SIZE);
271 . = ALIGN(CACHEALIGN_SIZE);
276 .pluginend . - NOCACHE_BASE :
278 _plugin_end_addr = .;
282 /* Special trick to avoid a linker error when no other sections are
283 left after garbage collection (plugin not for this platform) */