firmware/target/arm/ata-target.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 by Barry Wardell
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #ifdef CPU_PP
  23
  24 #ifdef HAVE_BOOTLOADER_USB_MODE
  25 #define ATA_DRIVER_CLOSE
  26 #endif
  27
  28 /* primary channel */
  29 #define ATA_DATA        (*((volatile unsigned short*)(IDE_BASE + 0x1e0)))
  30 #define ATA_ERROR       (*((volatile unsigned char*)(IDE_BASE + 0x1e4)))
  31 #define ATA_NSECTOR     (*((volatile unsigned char*)(IDE_BASE + 0x1e8)))
  32 #define ATA_SECTOR      (*((volatile unsigned char*)(IDE_BASE + 0x1ec)))
  33 #define ATA_LCYL        (*((volatile unsigned char*)(IDE_BASE + 0x1f0)))
  34 #define ATA_HCYL        (*((volatile unsigned char*)(IDE_BASE + 0x1f4)))
  35 #define ATA_SELECT      (*((volatile unsigned char*)(IDE_BASE + 0x1f8)))
  36 #define ATA_COMMAND     (*((volatile unsigned char*)(IDE_BASE + 0x1fc)))
  37 #define ATA_CONTROL     (*((volatile unsigned char*)(IDE_BASE + 0x3f8)))
  38
  39 #if (CONFIG_CPU == PP5002)
  40
  41 #define ATA_OUT8(reg,val) do { reg = (val); \
  42                               while (!(IDE_CFG_STATUS & 0x40)); \
  43                           } while (0)
  44
  45 /* Plain C reading and writing. See comment in ata-as-arm.S */
  46
  47 #elif defined CPU_PP502x
  48
  49 /* asm optimized reading and writing */
  50 #define ATA_OPTIMIZED_READING
  51 #define ATA_OPTIMIZED_WRITING
  52 void copy_read_sectors(unsigned char* buf, int wordcount);
  53 void copy_write_sectors(const unsigned char* buf, int wordcount);
  54
  55 #endif /* CONFIG_CPU */
  56
  57 #endif
  58
  59 void ata_reset(void);
  60 bool ata_is_coldstart(void);
  61 void ata_device_init(void);
  62
  63 #ifdef HAVE_ATA_DMA
  64
  65 /* IDE DMA controller registers */
  66 #define IDE_DMA_CONTROL (*(volatile unsigned long *)(0xc3000400))
  67 #define IDE_DMA_LENGTH  (*(volatile unsigned long *)(0xc3000408))
  68 #define IDE_DMA_ADDR    (*(volatile unsigned long *)(0xc300040C))
  69
  70 /* Maximum multi-word DMA mode supported by the controller */
  71 #define ATA_MAX_MWDMA 2
  72
  73 #ifndef BOOTLOADER
  74 /* The PP5020 supports UDMA 4, but it needs cpu boosting and only
  75  * improves performance by ~10% with a stock disk.
  76  * UDMA 2 is stable at 30 Mhz.
  77  * UDMA 1 is stable at 24 Mhz.
  78  */
  79 #if CPUFREQ_NORMAL >= 30000000
  80 #define ATA_MAX_UDMA 2
  81 #elif CPUFREQ_NORMAL >= 24000000
  82 #define ATA_MAX_UDMA 1
  83 #else
  84 #error "CPU speeds under 24Mhz have not been tested with DMA"
  85 #endif
  86 #else
  87 /* The bootloader runs at 24 Mhz and needs a slower mode */
  88 #define ATA_MAX_UDMA 1
  89 #endif
  90
  91 void ata_dma_set_mode(unsigned char mode);
  92 bool ata_dma_setup(void *addr, unsigned long bytes, bool write);
  93 bool ata_dma_finish(void);
  94
  95 #endif /* HAVE_ATA_DMA */