firmware/target/arm/as3525/ata_sd_as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 Daniel Ankers
  11  * Copyright © 2008-2009 Rafaël Carré
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 /* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
  24
  25 /* TODO: Find the real capacity of >2GB models (will be useful for USB) */
  26
  27 #include "config.h" /* for HAVE_MULTIDRIVE & AMS_OF_SIZE */
  28 #include "fat.h"
  29 #include "thread.h"
  30 #include "led.h"
  31 #include "hotswap.h"
  32 #include "system.h"
  33 #include "cpu.h"
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <string.h>
  37 #include "as3525.h"
  38 #include "pl180.h"  /* SD controller */
  39 #include "pl081.h"  /* DMA controller */
  40 #include "dma-target.h" /* DMA request lines */
  41 #include "clock-target.h"
  42 #include "panic.h"
  43 #ifdef HAVE_BUTTON_LIGHT
  44 #include "backlight-target.h"
  45 #endif
  46 #include "stdbool.h"
  47 #include "ata_idle_notify.h"
  48 #include "sd.h"
  49 #include "usb.h"
  50
  51 #ifdef HAVE_HOTSWAP
  52 #include "disk.h"
  53 #endif
  54
  55 /* command flags */
  56 #define MCI_NO_FLAGS    (0<<0)
  57 #define MCI_RESP        (1<<0)
  58 #define MCI_LONG_RESP   (1<<1)
  59 #define MCI_ARG         (1<<2)
  60
  61 /* ARM PL180 registers */
  62 #define MCI_POWER(i)       (*(volatile unsigned char *) (pl180_base[i]+0x00))
  63 #define MCI_CLOCK(i)       (*(volatile unsigned long *) (pl180_base[i]+0x04))
  64 #define MCI_ARGUMENT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x08))
  65 #define MCI_COMMAND(i)     (*(volatile unsigned long *) (pl180_base[i]+0x0C))
  66 #define MCI_RESPCMD(i)     (*(volatile unsigned long *) (pl180_base[i]+0x10))
  67 #define MCI_RESP0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x14))
  68 #define MCI_RESP1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x18))
  69 #define MCI_RESP2(i)       (*(volatile unsigned long *) (pl180_base[i]+0x1C))
  70 #define MCI_RESP3(i)       (*(volatile unsigned long *) (pl180_base[i]+0x20))
  71 #define MCI_DATA_TIMER(i)  (*(volatile unsigned long *) (pl180_base[i]+0x24))
  72 #define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
  73 #define MCI_DATA_CTRL(i)   (*(volatile unsigned char *) (pl180_base[i]+0x2C))
  74 #define MCI_DATA_CNT(i)    (*(volatile unsigned short*) (pl180_base[i]+0x30))
  75 #define MCI_STATUS(i)      (*(volatile unsigned long *) (pl180_base[i]+0x34))
  76 #define MCI_CLEAR(i)       (*(volatile unsigned long *) (pl180_base[i]+0x38))
  77 #define MCI_MASK0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x3C))
  78 #define MCI_MASK1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x40))
  79 #define MCI_SELECT(i)      (*(volatile unsigned long *) (pl180_base[i]+0x44))
  80 #define MCI_FIFO_CNT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x48))
  81
  82 #define MCI_ERROR \
  83     (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN)
  84
  85 #define MCI_FIFO(i)        ((unsigned long *) (pl180_base[i]+0x80))
  86 /* volumes */
  87 #define     INTERNAL_AS3525 0   /* embedded SD card */
  88 #define     SD_SLOT_AS3525   1   /* SD slot if present */
  89
  90 static const int pl180_base[NUM_DRIVES] = {
  91             NAND_FLASH_BASE
  92 #ifdef HAVE_MULTIDRIVE
  93             , SD_MCI_BASE
  94 #endif
  95 };
  96
  97 static int sd_wait_for_state(const int drive, unsigned int state);
  98 static int sd_select_bank(signed char bank);
  99 static int sd_init_card(const int drive);
 100 static void init_pl180_controller(const int drive);
 101 #define SECTOR_SIZE     512 /* XXX: different sector sizes ? */
 102 #define BLOCKS_PER_BANK 0x7a7800
 103
 104 static tCardInfo card_info[NUM_DRIVES];
 105
 106 /* maximum timeouts recommanded in the SD Specification v2.00 */
 107 #define SD_MAX_READ_TIMEOUT     ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
 108 #define SD_MAX_WRITE_TIMEOUT    ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
 109
 110 /* for compatibility */
 111 static long last_disk_activity = -1;
 112
 113 #define MIN_YIELD_PERIOD 5  /* ticks */
 114 static long next_yield = 0;
 115
 116 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
 117 static const char         sd_thread_name[] = "ata/sd";
 118 static struct mutex       sd_mtx;
 119 static struct event_queue sd_queue;
 120 #ifndef BOOTLOADER
 121 static bool sd_enabled = false;
 122 #endif
 123
 124 static struct wakeup transfer_completion_signal;
 125 static volatile unsigned int transfer_error[NUM_VOLUMES];
 126 #define PL180_MAX_TRANSFER_ERRORS 10
 127
 128 #define UNALIGNED_NUM_SECTORS 10
 129 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32)));   /* align on cache line size */
 130 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
 131
 132 static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
 133
 134 #ifdef HAVE_HOTSWAP
 135 static int sd1_oneshot_callback(struct timeout *tmo)
 136 {
 137     (void)tmo;
 138
 139     /* This is called only if the state was stable for 300ms - check state
 140      * and post appropriate event. */
 141     if (card_detect_target())
 142     {
 143         queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
 144     }
 145     else
 146         queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
 147
 148     return 0;
 149 }
 150
 151 void INT_GPIOA(void)
 152 {
 153     static struct timeout sd1_oneshot;
 154     /* acknowledge interrupt */
 155     GPIOA_IC = (1<<2);
 156     timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
 157 }
 158 #endif  /* HAVE_HOTSWAP */
 159
 160 void INT_NAND(void)
 161 {
 162     const int status = MCI_STATUS(INTERNAL_AS3525);
 163
 164     transfer_error[INTERNAL_AS3525] = status & MCI_ERROR;
 165
 166     wakeup_signal(&transfer_completion_signal);
 167     MCI_CLEAR(INTERNAL_AS3525) = status;
 168 }
 169
 170 #ifdef HAVE_MULTIDRIVE
 171 void INT_MCI0(void)
 172 {
 173     const int status = MCI_STATUS(SD_SLOT_AS3525);
 174
 175     transfer_error[SD_SLOT_AS3525] = status & MCI_ERROR;
 176
 177     wakeup_signal(&transfer_completion_signal);
 178     MCI_CLEAR(SD_SLOT_AS3525) = status;
 179 }
 180 #endif
 181
 182 static bool send_cmd(const int drive, const int cmd, const int arg,
 183                      const int flags, long *response)
 184 {
 185     int val, status;
 186
 187     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
 188
 189     if(MCI_COMMAND(drive) & MCI_COMMAND_ENABLE) /* clears existing command */
 190     {
 191         MCI_COMMAND(drive) = 0;
 192         mci_delay();
 193     }
 194
 195     val = cmd | MCI_COMMAND_ENABLE;
 196     if(flags & MCI_RESP)
 197     {
 198         val |= MCI_COMMAND_RESPONSE;
 199         if(flags & MCI_LONG_RESP)
 200             val |= MCI_COMMAND_LONG_RESPONSE;
 201     }
 202
 203     MCI_CLEAR(drive) = 0x7ff;
 204
 205     MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
 206     MCI_COMMAND(drive) = val;
 207
 208     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);  /* wait for cmd completion */
 209
 210     MCI_COMMAND(drive) = 0;
 211     MCI_ARGUMENT(drive) = ~0;
 212
 213     status = MCI_STATUS(drive);
 214     MCI_CLEAR(drive) = 0x7ff;
 215
 216     if(flags & MCI_RESP)
 217     {
 218         if(status & MCI_CMD_TIMEOUT)
 219             return false;
 220         else if(status & (MCI_CMD_CRC_FAIL /* FIXME? */ | MCI_CMD_RESP_END))
 221         {   /* resp received */
 222             if(flags & MCI_LONG_RESP)
 223             {
 224                 /* store the response in reverse words order */
 225                 response[0] = MCI_RESP3(drive);
 226                 response[1] = MCI_RESP2(drive);
 227                 response[2] = MCI_RESP1(drive);
 228                 response[3] = MCI_RESP0(drive);
 229             }
 230             else
 231                 response[0] = MCI_RESP0(drive);
 232             return true;
 233         }
 234     }
 235     else if(status & MCI_CMD_SENT)
 236         return true;
 237
 238     return false;
 239 }
 240
 241 static int sd_init_card(const int drive)
 242 {
 243     unsigned long response;
 244     long init_timeout;
 245     bool sd_v2 = false;
 246     unsigned long temp_reg[4];
 247     int i;
 248
 249     if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
 250         return -1;
 251
 252     mci_delay();
 253
 254     /*  CMD8  Check for v2 sd card */
 255     if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
 256         if((response & 0xFFF) == 0x1AA)
 257             sd_v2 = true;
 258
 259     /* timeout for initialization is 1sec, from SD Specification 2.00 */
 260     init_timeout = current_tick + HZ;
 261
 262     do {
 263         /* timeout */
 264         if(TIME_AFTER(current_tick, init_timeout))
 265             return -2;
 266
 267         /* app_cmd */
 268         if( !send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response) )
 269         {
 270             return -3;
 271         }
 272
 273         /* acmd41 If we have a v2 sd card set HCS bit[30] with voltage range */
 274         if(!send_cmd(drive, SD_APP_OP_COND, (0x00FF8000 | (sd_v2 ? 1<<30 : 0)),
 275                         MCI_RESP|MCI_ARG, &card_info[drive].ocr))
 276         {
 277             return -4;
 278         }
 279
 280     } while(!(card_info[drive].ocr & (1<<31)));
 281
 282     MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* full speed for controller clock */
 283     mci_delay();
 284
 285     /* send CID */
 286     if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
 287                             temp_reg))
 288         return -5;
 289
 290     for(i=0; i<4; i++)
 291         card_info[drive].cid[3-i] = temp_reg[i];
 292
 293     /* send RCA */
 294     if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
 295                 &card_info[drive].rca))
 296         return -6;
 297
 298     /*  Select card to put it in TRAN state */
 299     if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 300         return -7;
 301
 302     /* Try to switch V2 cards to HS timings, non HS seem to ignore this */
 303     if(sd_v2)
 304     {
 305         if(sd_wait_for_state(drive, SD_TRAN))
 306             return -8;
 307         if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
 308             return -9;
 309         mci_delay();
 310     }
 311
 312     /*  go back to STBY state so we can read csd */
 313     if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_ARG, NULL))
 314         return -10;
 315
 316     /* send CSD */
 317     if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
 318                  MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
 319         return -11;
 320
 321     for(i=0; i<4; i++)
 322         card_info[drive].csd[3-i] = temp_reg[i];
 323
 324     sd_parse_csd(&card_info[drive]);
 325
 326     /*  Select card to put back in TRAN state */
 327     if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 328         return -12;
 329
 330     /*
 331      * enable bank switching
 332      * without issuing this command, we only have access to 1/4 of the blocks
 333      * of the first bank (0x1E9E00 blocks, which is the size reported in the
 334      * CSD register)
 335      */
 336     if(drive == INTERNAL_AS3525)
 337     {
 338         const int ret = sd_select_bank(-1);
 339         if(ret < 0)
 340             return ret - 13;
 341     }
 342
 343     card_info[drive].initialized = 1;
 344
 345     return 0;
 346 }
 347
 348 static void sd_thread(void) __attribute__((noreturn));
 349 static void sd_thread(void)
 350 {
 351     struct queue_event ev;
 352     bool idle_notified = false;
 353
 354     while (1)
 355     {
 356         queue_wait_w_tmo(&sd_queue, &ev, HZ);
 357
 358         switch ( ev.id )
 359         {
 360 #ifdef HAVE_HOTSWAP
 361         case SYS_HOTSWAP_INSERTED:
 362         case SYS_HOTSWAP_EXTRACTED:
 363         {
 364             int microsd_init = 1;
 365             fat_lock();          /* lock-out FAT activity first -
 366                                     prevent deadlocking via disk_mount that
 367                                     would cause a reverse-order attempt with
 368                                     another thread */
 369             mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
 370                                     into driver that bypass the fat cache */
 371
 372             /* We now have exclusive control of fat cache and ata */
 373
 374             disk_unmount(SD_SLOT_AS3525);     /* release "by force", ensure file
 375                                     descriptors aren't leaked and any busy
 376                                     ones are invalid if mounting */
 377
 378             /* Force card init for new card, re-init for re-inserted one or
 379              * clear if the last attempt to init failed with an error. */
 380             card_info[SD_SLOT_AS3525].initialized = 0;
 381
 382             if (ev.id == SYS_HOTSWAP_INSERTED)
 383             {
 384                 sd_enable(true);
 385                 init_pl180_controller(SD_SLOT_AS3525);
 386                 microsd_init = sd_init_card(SD_SLOT_AS3525);
 387                 if (microsd_init < 0) /* initialisation failed */
 388                     panicf("microSD init failed : %d", microsd_init);
 389
 390                 microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
 391             }
 392
 393             /*
 394              * Mount succeeded, or this was an EXTRACTED event,
 395              * in both cases notify the system about the changed filesystems
 396              */
 397             if (microsd_init)
 398                 queue_broadcast(SYS_FS_CHANGED, 0);
 399
 400             /* Access is now safe */
 401             mutex_unlock(&sd_mtx);
 402             fat_unlock();
 403             sd_enable(false);
 404         }
 405             break;
 406 #endif
 407         case SYS_TIMEOUT:
 408             if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
 409             {
 410                 idle_notified = false;
 411             }
 412             else
 413             {
 414                 /* never let a timer wrap confuse us */
 415                 next_yield = current_tick;
 416
 417                 if (!idle_notified)
 418                 {
 419                     call_storage_idle_notifys(false);
 420                     idle_notified = true;
 421                 }
 422             }
 423             break;
 424
 425         case SYS_USB_CONNECTED:
 426             usb_acknowledge(SYS_USB_CONNECTED_ACK);
 427             /* Wait until the USB cable is extracted again */
 428             usb_wait_for_disconnect(&sd_queue);
 429
 430             break;
 431         case SYS_USB_DISCONNECTED:
 432             usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
 433             break;
 434         }
 435     }
 436 }
 437
 438 static void init_pl180_controller(const int drive)
 439 {
 440     MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
 441     MCI_CLEAR(drive) = 0x7ff;
 442
 443     MCI_MASK0(drive) = MCI_MASK1(drive) = MCI_ERROR | MCI_DATA_END;
 444
 445 #ifdef HAVE_MULTIDRIVE
 446     VIC_INT_ENABLE |=
 447         (drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
 448
 449     /* setup isr for microsd monitoring */
 450     VIC_INT_ENABLE |= (INTERRUPT_GPIOA);
 451     /* clear previous irq */
 452     GPIOA_IC = (1<<2);
 453     /* enable edge detecting */
 454     GPIOA_IS &= ~(1<<2);
 455     /* detect both raising and falling edges */
 456     GPIOA_IBE |= (1<<2);
 457
 458 #else
 459     VIC_INT_ENABLE |= INTERRUPT_NAND;
 460 #endif
 461
 462     MCI_POWER(drive) = MCI_POWER_UP|(10 /*voltage*/ << 2); /* use OF voltage */
 463     mci_delay();
 464
 465     MCI_POWER(drive) |= MCI_POWER_ON;
 466     mci_delay();
 467
 468     MCI_SELECT(drive) = 0;
 469
 470     MCI_CLOCK(drive) = MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV;
 471     mci_delay();
 472 }
 473
 474 int sd_init(void)
 475 {
 476     int ret;
 477     CGU_IDE =   (1<<7)  /* AHB interface enable */  |
 478                 (1<<6)  /* interface enable */      |
 479                 (AS3525_IDE_DIV << 2)               |
 480                 AS3525_CLK_PLLA;  /* clock source = PLLA */
 481
 482
 483     CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 484 #ifdef HAVE_MULTIDRIVE
 485     CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 486     CCU_IO &= ~(1<<3);           /* bits 3:2 = 01, xpd is SD interface */
 487     CCU_IO |= (1<<2);
 488 #endif
 489
 490     wakeup_init(&transfer_completion_signal);
 491
 492     init_pl180_controller(INTERNAL_AS3525);
 493     ret = sd_init_card(INTERNAL_AS3525);
 494     if(ret < 0)
 495         return ret;
 496 #ifdef HAVE_MULTIDRIVE
 497     init_pl180_controller(SD_SLOT_AS3525);
 498 #endif
 499
 500     /* init mutex */
 501     mutex_init(&sd_mtx);
 502
 503     queue_init(&sd_queue, true);
 504     create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
 505             sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
 506
 507 #ifndef BOOTLOADER
 508     sd_enabled = true;
 509     sd_enable(false);
 510 #endif
 511     return 0;
 512 }
 513
 514 #ifdef HAVE_HOTSWAP
 515 bool sd_removable(IF_MD_NONVOID(int drive))
 516 {
 517     return (drive==1);
 518 }
 519
 520 bool sd_present(IF_MD_NONVOID(int drive))
 521 {
 522     return (drive == 0) ? true : card_detect_target();
 523 }
 524 #endif /* HAVE_HOTSWAP */
 525
 526 static int sd_wait_for_state(const int drive, unsigned int state)
 527 {
 528     unsigned long response = 0;
 529     unsigned int timeout = 100; /* ticks */
 530     long t = current_tick;
 531
 532     while (1)
 533     {
 534         long tick;
 535
 536         if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
 537                     MCI_RESP|MCI_ARG, &response))
 538             return -1;
 539
 540         if (((response >> 9) & 0xf) == state)
 541             return 0;
 542
 543         if(TIME_AFTER(current_tick, t + timeout))
 544             return -2;
 545
 546         if (TIME_AFTER((tick = current_tick), next_yield))
 547         {
 548             yield();
 549             timeout += current_tick - tick;
 550             next_yield = tick + MIN_YIELD_PERIOD;
 551         }
 552     }
 553 }
 554
 555 static int sd_select_bank(signed char bank)
 556 {
 557     int ret;
 558     unsigned loops = 0;
 559
 560     do {
 561         if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 562             panicf("SD bank %d error : 0x%x", bank,
 563                     transfer_error[INTERNAL_AS3525]);
 564
 565         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 566         if (ret < 0)
 567             return ret - 2;
 568
 569         if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
 570             return -1;
 571
 572         mci_delay();
 573
 574         if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
 575             return -2;
 576
 577         mci_delay();
 578
 579         memset(uncached_buffer, 0, 512);
 580         if(bank == -1)
 581         {   /* enable bank switching */
 582             uncached_buffer[0] = 16;
 583             uncached_buffer[1] = 1;
 584             uncached_buffer[2] = 10;
 585         }
 586         else
 587             uncached_buffer[0] = bank;
 588
 589         dma_retain();
 590         /* we don't use the uncached buffer here, because we need the
 591          * physical memory address for DMA transfers */
 592         dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
 593             DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
 594             NULL);
 595
 596         MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT;
 597         MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
 598         MCI_DATA_CTRL(INTERNAL_AS3525) =  (1<<0) /* enable */   |
 599                                 (0<<1) /* transfer direction */ |
 600                                 (1<<3) /* DMA */                |
 601                                 (9<<4) /* 2^9 = 512 */ ;
 602
 603         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 604
 605         /*  Wait for FIFO to empty  */
 606         while(MCI_STATUS(INTERNAL_AS3525) & (MCI_TX_ACTIVE | MCI_RX_ACTIVE));
 607
 608         dma_release();
 609
 610         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 611         if (ret < 0)
 612             return ret - 4;
 613     } while(transfer_error[INTERNAL_AS3525]);
 614
 615     card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
 616
 617     return 0;
 618 }
 619
 620 static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
 621                                int count, void* buf, const bool write)
 622 {
 623 #ifndef HAVE_MULTIDRIVE
 624     const int drive = 0;
 625 #endif
 626     int ret = 0;
 627     unsigned loops = 0;
 628
 629     /* skip SanDisk OF */
 630     if (drive == INTERNAL_AS3525)
 631         start += AMS_OF_SIZE;
 632
 633     mutex_lock(&sd_mtx);
 634 #ifndef BOOTLOADER
 635     sd_enable(true);
 636     led(true);
 637 #endif
 638
 639     if (card_info[drive].initialized <= 0)
 640     {
 641         ret = sd_init_card(drive);
 642         if (!(card_info[drive].initialized))
 643             goto sd_transfer_error;
 644     }
 645
 646     last_disk_activity = current_tick;
 647
 648     ret = sd_wait_for_state(drive, SD_TRAN);
 649     if (ret < 0)
 650     {
 651         ret -= 20;
 652         goto sd_transfer_error;
 653     }
 654
 655     dma_retain();
 656
 657     while(count)
 658     {
 659         /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
 660          * register, so we have to transfer maximum 127 sectors at a time. */
 661         unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
 662         void *dma_buf;
 663         const int cmd =
 664             write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
 665         unsigned long bank_start = start;
 666
 667         /* Only switch banks for internal storage */
 668         if(drive == INTERNAL_AS3525)
 669         {
 670             unsigned int bank = start / BLOCKS_PER_BANK; /* Current bank */
 671
 672             /* Switch bank if needed */
 673             if(card_info[INTERNAL_AS3525].current_bank != bank)
 674             {
 675                 ret = sd_select_bank(bank);
 676                 if (ret < 0)
 677                 {
 678                     ret -= 2*20;
 679                     goto sd_transfer_error;
 680                 }
 681             }
 682
 683             /* Adjust start block in current bank */
 684             bank_start -= bank * BLOCKS_PER_BANK;
 685
 686             /* Do not cross a bank boundary in a single transfer loop */
 687             if((transfer + bank_start) > BLOCKS_PER_BANK)
 688                 transfer = BLOCKS_PER_BANK - bank_start;
 689         }
 690
 691         dma_buf = aligned_buffer;
 692         if(transfer > UNALIGNED_NUM_SECTORS)
 693             transfer = UNALIGNED_NUM_SECTORS;
 694         if(write)
 695             memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE);
 696
 697         /* Set bank_start to the correct unit (blocks or bytes) */
 698         if(!(card_info[drive].ocr & (1<<30)))   /* not SDHC */
 699             bank_start *= SD_BLOCK_SIZE;
 700
 701         if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
 702         {
 703             ret -= 3*20;
 704             goto sd_transfer_error;
 705         }
 706
 707         if(write)
 708             dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
 709                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 710                 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
 711         else
 712             dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
 713                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 714                 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
 715
 716         /* FIXME : we should check if the timeouts calculated from the card's
 717          * CSD are lower, and use them if it is the case
 718          * Note : the OF doesn't seem to use them anyway */
 719         MCI_DATA_TIMER(drive) = write ?
 720                 SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
 721         MCI_DATA_LENGTH(drive) = transfer * card_info[drive].blocksize;
 722         MCI_DATA_CTRL(drive) =  (1<<0) /* enable */                     |
 723                                 (!write<<1) /* transfer direction */    |
 724                                 (1<<3) /* DMA */                        |
 725                                 (9<<4) /* 2^9 = 512 */ ;
 726
 727
 728         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 729
 730         /*  Wait for FIFO to empty  */
 731         while(MCI_STATUS(drive) & (MCI_TX_ACTIVE | MCI_RX_ACTIVE));
 732
 733         if(!transfer_error[drive])
 734         {
 735             if(!write)
 736                 memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE);
 737             buf += transfer * SECTOR_SIZE;
 738             start += transfer;
 739             count -= transfer;
 740             loops = 0;  /* reset errors counter */
 741         }
 742         else if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 743                 panicf("SD transfer error : 0x%x", transfer_error[drive]);
 744
 745         last_disk_activity = current_tick;
 746
 747         if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
 748         {
 749             ret = -4*20;
 750             goto sd_transfer_error;
 751         }
 752
 753         ret = sd_wait_for_state(drive, SD_TRAN);
 754         if (ret < 0)
 755         {
 756             ret -= 5*20;
 757             goto sd_transfer_error;
 758         }
 759     }
 760
 761     ret = 0;    /* success */
 762
 763 sd_transfer_error:
 764
 765     dma_release();
 766
 767 #ifndef BOOTLOADER
 768     led(false);
 769     sd_enable(false);
 770 #endif
 771
 772     if (ret)    /* error */
 773         card_info[drive].initialized = 0;
 774
 775     mutex_unlock(&sd_mtx);
 776     return ret;
 777 }
 778
 779 int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int count,
 780                      void* buf)
 781 {
 782     return sd_transfer_sectors(IF_MD2(drive,) start, count, buf, false);
 783 }
 784
 785 int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
 786                      const void* buf)
 787 {
 788
 789 #ifdef BOOTLOADER /* we don't need write support in bootloader */
 790 #ifdef HAVE_MULTIDRIVE
 791     (void) drive;
 792 #endif
 793     (void) start;
 794     (void) count;
 795     (void) buf;
 796     return -1;
 797 #else
 798     return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true);
 799 #endif
 800 }
 801
 802 #ifndef BOOTLOADER
 803 long sd_last_disk_activity(void)
 804 {
 805     return last_disk_activity;
 806 }
 807
 808 void sd_enable(bool on)
 809 {
 810     /* buttonlight AMSes need a bit of special handling for the buttonlight here
 811      * due to the dual mapping of GPIOD and XPD */
 812 #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
 813     extern int buttonlight_is_on;
 814 #endif
 815
 816 #ifdef HAVE_HOTSWAP
 817     static bool cpu_boosted = false;
 818 #endif
 819
 820     if (sd_enabled == on)
 821         return; /* nothing to do */
 822     if(on)
 823     {
 824         CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 825 #ifdef HAVE_MULTIDRIVE
 826         CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 827 #ifdef HAVE_BUTTON_LIGHT
 828         CCU_IO |= (1<<2);
 829         if (buttonlight_is_on)
 830             GPIOD_DIR &= ~(1<<7);
 831         else
 832             _buttonlight_off();
 833 #endif /* HAVE_BUTTON_LIGHT */
 834 #endif /* HAVE_MULTIDRIVE */
 835         CGU_IDE |= (1<<7)  /* AHB interface enable */  |
 836                    (1<<6)  /* interface enable */;
 837         sd_enabled = true;
 838
 839 #ifdef HAVE_HOTSWAP
 840         if(card_detect_target())  /* If SD card present Boost cpu for voltage */
 841         {
 842             cpu_boosted = true;
 843             cpu_boost(true);
 844         }
 845 #endif
 846     }
 847     else
 848     {
 849         CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
 850 #ifdef HAVE_MULTIDRIVE
 851 #ifdef HAVE_BUTTON_LIGHT
 852         CCU_IO &= ~(1<<2);
 853         if (buttonlight_is_on)
 854             _buttonlight_on();
 855 #endif /* HAVE_BUTTON_LIGHT */
 856         CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
 857 #endif /* HAVE_MULTIDRIVE */
 858         CGU_IDE &= ~((1<<7)|(1<<6));
 859         sd_enabled = false;
 860
 861 #ifdef HAVE_HOTSWAP
 862         if(cpu_boosted)
 863         {
 864             cpu_boost(false);
 865             cpu_boosted = false;
 866         }
 867 #endif
 868     }
 869 }
 870
 871 tCardInfo *card_get_info_target(int card_no)
 872 {
 873     return &card_info[card_no];
 874 }
 875
 876 bool card_detect_target(void)
 877 {
 878 #if defined(HAVE_MULTIDRIVE)
 879     return !(GPIOA_PIN(2));
 880 #else
 881     return false;
 882 #endif
 883 }
 884
 885 #ifdef HAVE_HOTSWAP
 886 void card_enable_monitoring_target(bool on)
 887 {
 888     if (on) /* enable interrupt */
 889         GPIOA_IE |= (1<<2);
 890     else    /* disable interrupt */
 891         GPIOA_IE &= ~(1<<2);
 892 }
 893 #endif /* HAVE_HOTSWAP */
 894
 895 #endif /* !BOOTLOADER */
 896
 897 #ifdef CONFIG_STORAGE_MULTI
 898 int sd_num_drives(int first_drive)
 899 {
 900     /* We don't care which logical drive number(s) we have been assigned */
 901     (void)first_drive;
 902
 903     return NUM_DRIVES;
 904 }
 905 #endif /* CONFIG_STORAGE_MULTI */