1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2011 by Amaury Pouly
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
24 .section .vectors,"ax",%progbits
26 /* most handlers are in DRAM which is too far away for a relative jump */
28 ldr pc, =undef_instr_handler
29 ldr pc, =software_int_handler
30 ldr pc, =prefetch_abort_handler
31 ldr pc, =data_abort_handler
32 ldr pc, =reserved_handler
36 /* When starting, we will be running at 0x40000000 most probably
37 * but the code is expected to be loaded at 0x4xxxxxxx (uncached) and to be
38 * running at virtual address 0xyyyyyyyy (cached). So we first
39 * need to move everything to the right locationn then we setup the mmu and
40 * jump to the final virtual address. */
43 /** The code below must be able to run at any address **/
45 /* Copy running address */
50 /* enter supervisor mode, disable IRQ/FIQ */
52 /* Disable MMU, disable caching and buffering;
53 * use low exception range address (the core uses high range by default) */
54 mrc p15, 0, r0, c1, c0, 0
57 mcr p15, 0, r0, c1, c0, 0
59 /* To call the C code we need a stack, since the stack is in virtual memory
60 * use the stack's physical address */
61 ldr sp, =stackend_phys
67 * Assume the dram binary blob is located at the loading address (r5) */
69 ldr r3, =_dramcopystart
78 mcr p15, 0, r2, c7, c5, 0 @ Invalidate ICache
80 /* Jump to real location */
83 /** The code below is be running at the right virtual address **/
94 /* must be done before bss is zeroed */
104 #ifdef HAVE_INIT_ATTR
105 /* copy init data to codec buffer */
106 /* must be done before bss is zeroed */
117 mcr p15, 0, r2, c7, c5, 0 @ Invalidate ICache
120 /* Initialise bss section to zero */
129 /* Set up stack for IRQ mode */
133 /* Set up stack for FIQ mode */
137 /* Let svc, abort and undefined modes use irq stack */
145 /* Switch to sys mode */
148 /* Set up some stack and munge it with 0xdeadbeef */
164 /* 256 words of IRQ stack */
168 /* 256 words of FIQ stack */