1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2002 Randy D. Wood
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
24 #ifdef HAVE_REMOTE_LCD
25 #include "lcd-remote.h"
36 #include "core_alloc.h"
41 #include "crc32-mi4.h"
42 #undef FIRMWARE_OFFSET_FILE_CRC
43 #undef FIRMWARE_OFFSET_FILE_DATA
44 #define FIRMWARE_OFFSET_FILE_CRC 0xC
45 #define FIRMWARE_OFFSET_FILE_DATA 0x200
49 #include "rkw-loader.h"
52 #if !defined(IRIVER_IFP7XX_SERIES)
53 /* FIX: this doesn't work on iFP */
55 #define IRQ0_EDGE_TRIGGER 0x80
57 static int rolo_handle
;
59 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
60 * the new firmware is being loaded, and then jump to the start of SDRAM
61 * TODO: Use the mailboxes built into the PP processor for this
65 volatile unsigned char IDATA_ATTR cpu_message
= 0;
66 volatile unsigned char IDATA_ATTR cpu_reply
= 0;
67 extern int cop_idlestackbegin
[];
69 void rolo_restart_cop(void) ICODE_ATTR
;
70 void rolo_restart_cop(void)
72 if (CURRENT_CORE
== CPU
)
74 /* There should be free thread slots aplenty */
75 create_thread(rolo_restart_cop
, cop_idlestackbegin
, IDLE_STACK_SIZE
,
76 0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME
)
83 /* Invalidate cache */
84 commit_discard_idcache();
87 CACHE_CTL
= CACHE_CTL_DISABLE
;
89 /* Tell the main core that we're ready to reload */
92 /* Wait while RoLo loads the image into SDRAM */
93 /* TODO: Accept checksum failure gracefully */
94 while(cpu_message
!= 1);
96 /* Acknowledge the CPU and then reload */
104 #endif /* NUM_CORES > 1 */
107 static void rolo_error(const char *text
)
109 rolo_handle
= core_free(rolo_handle
);
111 lcd_puts(0, 0, "ROLO error:");
112 lcd_puts_scroll(0, 1, text
);
120 #if CONFIG_CPU == SH7034 || CONFIG_CPU == IMX31L || CONFIG_CPU == RK27XX
121 /* these are in assembler file "descramble.S" for SH7034 */
122 extern unsigned short descramble(const unsigned char* source
,
123 unsigned char* dest
, int length
);
124 /* this is in firmware/target/arm/imx31/rolo_restart.c for IMX31 */
125 /* this is in firmware/target/arm/rk27xx/rolo_restart.c for rk27xx */
126 extern void rolo_restart(const unsigned char* source
, unsigned char* dest
,
130 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
131 targets that are low on iram, like the gigabeat F/X */
132 void rolo_restart(const unsigned char* source
, unsigned char* dest
,
133 long length
) __attribute__ ((section(".icode")));
134 void rolo_restart(const unsigned char* source
, unsigned char* dest
,
138 unsigned char* localdest
= dest
;
140 /* This is the equivalent of a call to memcpy() but this must be done from
141 iram to avoid overwriting itself and we don't want to depend on memcpy()
142 always being in iram */
143 for(i
= 0;i
< length
;i
++)
144 *localdest
++ = *source
++;
146 #if defined(CPU_COLDFIRE)
148 "movec.l %0,%%vbr \n"
149 "move.l (%0)+,%%sp \n"
154 #elif defined(CPU_PP)
158 commit_discard_idcache();
161 CACHE_CTL
= CACHE_CTL_DISABLE
;
163 /* Reset the memory mapping registers to zero */
165 volatile unsigned long *mmap_reg
;
166 for (mmap_reg
= &MMAP_FIRST
; mmap_reg
<= &MMAP_LAST
; mmap_reg
++)
171 /* Tell the COP it's safe to continue rebooting */
174 /* Wait for the COP to tell us it is rebooting */
175 while(cpu_reply
!= 2);
183 #elif defined(CPU_ARM)
184 /* Flush and invalidate caches */
185 commit_discard_idcache();
190 #elif defined(CPU_MIPS)
191 __dcache_writeback_all();
200 /* This is assigned in the linker control file */
201 extern unsigned long loadaddress
;
203 /***************************************************************************
205 * Name: rolo_load(const char *filename)
206 * Filename must be a fully defined filename including the path and extension
208 ***************************************************************************/
210 int rolo_load(const char* filename
)
212 unsigned char* ramstart
= (void*)&loadaddress
;
213 unsigned char* filebuf
;
218 lcd_puts(0, 0, "ROLO...");
219 lcd_puts(0, 1, "Loading");
221 #ifdef HAVE_REMOTE_LCD
222 lcd_remote_clear_display();
223 lcd_remote_puts(0, 0, "ROLO...");
224 lcd_remote_puts(0, 1, "Loading");
230 /* get the system buffer. release only in case of error, otherwise
231 * we don't return anyway */
232 rolo_handle
= core_alloc_maximum("rolo", &filebuf_size
, NULL
);
233 filebuf
= core_get_data(rolo_handle
);
235 errno
= load_rkw(filebuf
, filename
, filebuf_size
);
238 rolo_error(rkw_strerror(errno
));
244 #ifdef HAVE_STORAGE_FLUSH
245 lcd_puts(0, 1, "Flushing storage buffers");
250 lcd_puts(0, 1, "Executing");
252 #ifdef HAVE_REMOTE_LCD
253 lcd_remote_puts(0, 1, "Executing");
258 disable_interrupt(IRQ_FIQ_STATUS
);
260 rolo_restart(filebuf
, ramstart
, length
);
266 int rolo_load(const char* filename
)
270 #if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
271 #if !defined(MI4_FORMAT)
274 unsigned long checksum
,file_checksum
;
277 unsigned short checksum
,file_checksum
;
279 unsigned char* ramstart
= (void*)&loadaddress
;
280 unsigned char* filebuf
;
284 lcd_puts(0, 0, "ROLO...");
285 lcd_puts(0, 1, "Loading");
287 #ifdef HAVE_REMOTE_LCD
288 lcd_remote_clear_display();
289 lcd_remote_puts(0, 0, "ROLO...");
290 lcd_remote_puts(0, 1, "Loading");
296 fd
= open(filename
, O_RDONLY
);
298 rolo_error("File not found");
302 length
= filesize(fd
) - FIRMWARE_OFFSET_FILE_DATA
;
304 /* get the system buffer. release only in case of error, otherwise
305 * we don't return anyway */
306 rolo_handle
= core_alloc_maximum("rolo", &filebuf_size
, NULL
);
307 filebuf
= core_get_data(rolo_handle
);
309 #if CONFIG_CPU != SH7034
310 /* Read and save checksum */
311 lseek(fd
, FIRMWARE_OFFSET_FILE_CRC
, SEEK_SET
);
312 if (read(fd
, &file_checksum
, 4) != 4) {
313 rolo_error("Error Reading checksum");
317 #if !defined(MI4_FORMAT)
318 /* Rockbox checksums are big-endian */
319 file_checksum
= betoh32(file_checksum
);
322 #if defined(CPU_PP) && NUM_CORES > 1
323 lcd_puts(0, 2, "Waiting for coprocessor...");
326 /* Wait for COP to be in safe code */
327 while(cpu_reply
!= 1);
332 lseek(fd
, FIRMWARE_OFFSET_FILE_DATA
, SEEK_SET
);
334 /* this shouldn't happen, but well */
335 if ((long)filebuf_size
< length
)
337 rolo_error("File too big");
341 if (read(fd
, filebuf
, length
) != length
) {
342 rolo_error("Error Reading File");
347 /* Check CRC32 to see if we have a valid file */
348 chksum_crc32gentab();
349 checksum
= chksum_crc32 (filebuf
, length
);
351 checksum
= MODEL_NUMBER
;
353 for(i
= 0;i
< length
;i
++) {
354 checksum
+= filebuf
[i
];
358 /* Verify checksum against file header */
359 if (checksum
!= file_checksum
) {
360 rolo_error("Checksum Error");
364 #ifdef HAVE_STORAGE_FLUSH
365 lcd_puts(0, 1, "Flushing storage buffers");
370 lcd_puts(0, 1, "Executing");
372 #ifdef HAVE_REMOTE_LCD
373 lcd_remote_puts(0, 1, "Executing");
378 #if CONFIG_CPU != IMX31L /* We're not finished yet */
380 /* Should do these together since some ARM version should never have
381 * FIQ disabled and not IRQ (imx31 errata). */
382 disable_interrupt(IRQ_FIQ_STATUS
);
384 /* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
385 set_irq_level(DISABLE_INTERRUPTS
);
387 #endif /* CONFIG_CPU == IMX31L */
389 #else /* CONFIG_CPU == SH7034 */
390 /* Read file length from header and compare to real file length */
391 lseek(fd
, FIRMWARE_OFFSET_FILE_LENGTH
, SEEK_SET
);
392 if(read(fd
, &file_length
, 4) != 4) {
393 rolo_error("Error Reading File Length");
396 if (length
!= file_length
) {
397 rolo_error("File length mismatch");
401 /* Read and save checksum */
402 lseek(fd
, FIRMWARE_OFFSET_FILE_CRC
, SEEK_SET
);
403 if (read(fd
, &file_checksum
, 2) != 2) {
404 rolo_error("Error Reading checksum");
407 lseek(fd
, FIRMWARE_OFFSET_FILE_DATA
, SEEK_SET
);
409 /* verify that file can be read and descrambled */
410 if ((size_t)((2*length
)+4) >= filebuf_size
) {
411 rolo_error("Not enough room to load file");
415 if (read(fd
, &filebuf
[length
], length
) != (int)length
) {
416 rolo_error("Error Reading File");
420 lcd_puts(0, 1, "Descramble");
423 checksum
= descramble(filebuf
+ length
, filebuf
, length
);
425 /* Verify checksum against file header */
426 if (checksum
!= file_checksum
) {
427 rolo_error("Checksum Error");
431 #ifdef HAVE_STORAGE_FLUSH
432 lcd_puts(0, 1, "Flushing ");
437 lcd_puts(0, 1, "Executing ");
440 set_irq_level(HIGHEST_IRQ_LEVEL
);
442 /* Calling these 2 initialization routines was necessary to get the
443 the origional Archos version of the firmware to load and execute. */
444 system_init(); /* Initialize system for restart */
445 i2c_init(); /* Init i2c bus - it seems like a good idea */
446 ICR
= IRQ0_EDGE_TRIGGER
; /* Make IRQ0 edge triggered */
447 TSTR
= 0xE0; /* disable all timers */
448 /* model-specific de-init, needed when flashed */
449 /* Especially the Archos software is picky about this */
450 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
451 defined(ARCHOS_FMRECORDER)
455 rolo_restart(filebuf
, ramstart
, length
);
457 return 0; /* this is never reached */
458 (void)checksum
; (void)file_checksum
;
460 #endif /* ifdef RKW_FORMAT */
461 #else /* !defined(IRIVER_IFP7XX_SERIES) */
462 int rolo_load(const char* filename
)
469 #endif /* !defined(IRIVER_IFP7XX_SERIES) */