firmware/target/arm/as3525/pcm-as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2008-2009 Rafaël Carré
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include "system.h"
  22 #include "audio.h"
  23 #include "string.h"
  24 #include "as3525.h"
  25 #include "pl081.h"
  26 #include "dma-target.h"
  27 #include "clock-target.h"
  28 #include "panic.h"
  29 #include "as3514.h"
  30 #include "audiohw.h"
  31 #include "mmu-arm.h"
  32
  33 #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
  34                                       * i.e. 32 bits at once (size of I2SO_DATA)
  35                                       * and the number of 32bits words has to
  36                                       * fit in 11 bits of DMA register */
  37
  38 static unsigned char *dma_start_addr;
  39 static size_t      dma_size;   /* in 4*32 bits */
  40 static void dma_callback(void);
  41 static int locked = 0;
  42
  43 /* Mask the DMA interrupt */
  44 void pcm_play_lock(void)
  45 {
  46     if(++locked == 1)
  47         VIC_INT_EN_CLEAR = INTERRUPT_DMAC;
  48 }
  49
  50 /* Unmask the DMA interrupt if enabled */
  51 void pcm_play_unlock(void)
  52 {
  53     if(--locked == 0)
  54         VIC_INT_ENABLE = INTERRUPT_DMAC;
  55 }
  56
  57 static void play_start_pcm(void)
  58 {
  59     const unsigned char* addr = dma_start_addr;
  60     size_t size = dma_size;
  61     if(size > MAX_TRANSFER)
  62         size = MAX_TRANSFER;
  63
  64     dma_size -= size;
  65     dma_start_addr += size;
  66
  67     clean_dcache_range((void*)addr, size);  /* force write back */
  68     dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
  69                 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1,
  70                 dma_callback);
  71 }
  72
  73 static void dma_callback(void)
  74 {
  75     if(!dma_size)
  76     {
  77         pcm_play_get_more_callback((void **)&dma_start_addr, &dma_size);
  78
  79         if (!dma_size)
  80             return;
  81     }
  82
  83     play_start_pcm();
  84 }
  85
  86 void pcm_play_dma_start(const void *addr, size_t size)
  87 {
  88     dma_size = size;
  89     dma_start_addr = (unsigned char*)addr;
  90
  91     CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
  92     CGU_AUDIO |= (1<<11);
  93
  94     dma_retain();
  95
  96     play_start_pcm();
  97 }
  98
  99 void pcm_play_dma_stop(void)
 100 {
 101     dma_disable_channel(1);
 102     dma_size = 0;
 103
 104     dma_release();
 105
 106     CGU_PERI &= ~CGU_I2SOUT_APB_CLOCK_ENABLE;
 107     CGU_AUDIO &= ~(1<<11);
 108 }
 109
 110 void pcm_play_dma_pause(bool pause)
 111 {
 112     if(pause)
 113         dma_disable_channel(1);
 114     else
 115         play_start_pcm();
 116 }
 117
 118 void pcm_play_dma_init(void)
 119 {
 120     CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
 121
 122     I2SOUT_CONTROL = (1<<6)|(1<<3)  /* enable dma, stereo */;
 123
 124     audiohw_preinit();
 125 }
 126
 127 void pcm_postinit(void)
 128 {
 129     audiohw_postinit();
 130 }
 131
 132 /* divider is 9 bits but the highest one (for 8kHz) fit in 8 bits */
 133 static const unsigned char divider[SAMPR_NUM_FREQ] = {
 134     [HW_FREQ_96] = ((AS3525_MCLK_FREQ/128 + SAMPR_96/2) / SAMPR_96) - 1,
 135     [HW_FREQ_88] = ((AS3525_MCLK_FREQ/128 + SAMPR_88/2) / SAMPR_88) - 1,
 136     [HW_FREQ_64] = ((AS3525_MCLK_FREQ/128 + SAMPR_64/2) / SAMPR_64) - 1,
 137     [HW_FREQ_48] = ((AS3525_MCLK_FREQ/128 + SAMPR_48/2) / SAMPR_48) - 1,
 138     [HW_FREQ_44] = ((AS3525_MCLK_FREQ/128 + SAMPR_44/2) / SAMPR_44) - 1,
 139     [HW_FREQ_32] = ((AS3525_MCLK_FREQ/128 + SAMPR_32/2) / SAMPR_32) - 1,
 140     [HW_FREQ_24] = ((AS3525_MCLK_FREQ/128 + SAMPR_24/2) / SAMPR_24) - 1,
 141     [HW_FREQ_22] = ((AS3525_MCLK_FREQ/128 + SAMPR_22/2) / SAMPR_22) - 1,
 142     [HW_FREQ_16] = ((AS3525_MCLK_FREQ/128 + SAMPR_16/2) / SAMPR_16) - 1,
 143     [HW_FREQ_12] = ((AS3525_MCLK_FREQ/128 + SAMPR_12/2) / SAMPR_12) - 1,
 144     [HW_FREQ_11] = ((AS3525_MCLK_FREQ/128 + SAMPR_11/2) / SAMPR_11) - 1,
 145     [HW_FREQ_8 ] = ((AS3525_MCLK_FREQ/128 + SAMPR_8 /2) / SAMPR_8 ) - 1,
 146 };
 147
 148 static inline unsigned char mclk_divider(void)
 149 {
 150     return divider[pcm_fsel];
 151 }
 152
 153 void pcm_dma_apply_settings(void)
 154 {
 155     int cgu_audio = CGU_AUDIO;              /* read register */
 156     cgu_audio &= ~(3 << 0);                 /* clear i2sout MCLK_SEL */
 157     cgu_audio |=  (AS3525_MCLK_SEL << 0);   /* set i2sout MCLK_SEL */
 158     cgu_audio &= ~(0x1ff << 2);             /* clear i2sout divider */
 159     cgu_audio |= mclk_divider() << 2;       /* set new i2sout divider */
 160     CGU_AUDIO = cgu_audio;                  /* write back register */
 161 }
 162
 163 size_t pcm_get_bytes_waiting(void)
 164 {
 165     return dma_size;
 166 }
 167
 168 const void * pcm_play_dma_get_peak_buffer(int *count)
 169 {
 170     *count = dma_size >> 2;
 171     return (const void*)dma_start_addr;
 172 }
 173
 174 #ifdef HAVE_PCM_DMA_ADDRESS
 175 void * pcm_dma_addr(void *addr)
 176 {
 177     if (addr != NULL)
 178         addr = AS3525_UNCACHED_ADDR(addr);
 179     return addr;
 180 }
 181 #endif
 182
 183
 184 /****************************************************************************
 185  ** Recording DMA transfer
 186  **/
 187 #ifdef HAVE_RECORDING
 188
 189 static int rec_locked = 0;
 190 static unsigned char *rec_dma_start_addr;
 191 static size_t rec_dma_size, rec_dma_transfer_size;
 192 static void rec_dma_callback(void);
 193 #if CONFIG_CPU == AS3525
 194 /* points to the samples which need to be duplicated into the right channel */
 195 static int16_t *mono_samples;
 196 #endif
 197
 198
 199 void pcm_rec_lock(void)
 200 {
 201     if(++rec_locked == 1)
 202         VIC_INT_EN_CLEAR = INTERRUPT_DMAC;
 203 }
 204
 205
 206 void pcm_rec_unlock(void)
 207 {
 208     if(--rec_locked == 0)
 209         VIC_INT_ENABLE = INTERRUPT_DMAC;
 210 }
 211
 212
 213 static void rec_dma_start(void)
 214 {
 215     rec_dma_transfer_size = rec_dma_size;
 216
 217     /* We are limited to 8188 DMA transfers, and the recording core asks for
 218      * 8192 bytes. Avoid splitting 8192 bytes transfers in 8188 + 4 */
 219     if(rec_dma_transfer_size > 4096)
 220         rec_dma_transfer_size = 4096;
 221
 222     dma_enable_channel(1, (void*)I2SIN_DATA, rec_dma_start_addr, DMA_PERI_I2SIN,
 223                 DMAC_FLOWCTRL_DMAC_PERI_TO_MEM, false, true,
 224                 rec_dma_transfer_size >> 2, DMA_S4, rec_dma_callback);
 225 }
 226
 227
 228 /* if needed, duplicate samples of the working channel until the given bound */
 229 static inline void mono2stereo(int16_t *end)
 230 {
 231 #if CONFIG_CPU == AS3525
 232     if(audio_channels != 1) /* only for microphone */
 233         return;
 234 #if 0
 235     /* load pointer in a register and avoid updating it in each loop */
 236     register int16_t *samples = mono_samples;
 237
 238     do {
 239         int16_t left = *samples++;  // load 1 sample of the left-channel
 240         *samples++ = left;          // copy it in the right-channel
 241     } while(samples != end);
 242
 243     mono_samples = samples; /* update pointer */
 244 #else
 245     /* gcc doesn't use pre indexing : let's save 1 cycle */
 246     int16_t left;
 247     asm (
 248         "1: ldrh %0, [%1], #2   \n" // load 1 sample of the left-channel
 249         "   strh %0, [%1], #2   \n" // copy it in the right-channel
 250         "   cmp %1, %2          \n" // are we finished?
 251         "   bne  1b             \n"
 252         : "=r"(left), "+r"(mono_samples)
 253         : "r"(end)
 254         : "memory"
 255     );
 256 #endif /* C / ASM */
 257 #else
 258     /* microphone recording is stereo on as3525v2 */
 259     (void)end;
 260 #endif
 261 }
 262
 263 static void rec_dma_callback(void)
 264 {
 265     rec_dma_size -= rec_dma_transfer_size;
 266     rec_dma_start_addr += rec_dma_transfer_size;
 267
 268     /* the 2nd channel is silent when recording microphone on as3525v1 */
 269     mono2stereo(AS3525_UNCACHED_ADDR((int16_t*)rec_dma_start_addr));
 270
 271     if(!rec_dma_size)
 272     {
 273         pcm_rec_more_ready_callback(0, (void **)&rec_dma_start_addr,
 274                                     &rec_dma_size);
 275
 276         if(rec_dma_size == 0)
 277             return;
 278
 279         dump_dcache_range(rec_dma_start_addr, rec_dma_size);
 280 #if CONFIG_CPU == AS3525
 281         mono_samples = AS3525_UNCACHED_ADDR((int16_t*)rec_dma_start_addr);
 282 #endif
 283     }
 284
 285     rec_dma_start();
 286 }
 287
 288 void pcm_rec_dma_stop(void)
 289 {
 290     dma_disable_channel(1);
 291     dma_release();
 292     rec_dma_size = 0;
 293
 294     I2SOUT_CONTROL &= ~(1<<5); /* source = i2soutif fifo */
 295     I2SIN_CONTROL &= ~(1<<11); /* disable dma */
 296
 297     CGU_AUDIO &= ~((1<<23)|(1<<11));
 298     CGU_PERI &= ~(CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE);
 299 }
 300
 301
 302 void pcm_rec_dma_start(void *addr, size_t size)
 303 {
 304     dump_dcache_range(addr, size);
 305     rec_dma_start_addr = addr;
 306 #if CONFIG_CPU == AS3525
 307     mono_samples = AS3525_UNCACHED_ADDR(addr);
 308 #endif
 309     rec_dma_size = size;
 310
 311     dma_retain();
 312
 313     CGU_PERI |= CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE;
 314     CGU_AUDIO |= ((1<<23)|(1<<11));
 315
 316     I2SOUT_CONTROL |= 1<<5; /* source = loopback from i2sin fifo */
 317
 318     I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */
 319
 320     rec_dma_start();
 321 }
 322
 323
 324 void pcm_rec_dma_close(void)
 325 {
 326 }
 327
 328
 329 void pcm_rec_dma_init(void)
 330 {
 331     int cgu_audio = CGU_AUDIO;              /* read register */
 332     cgu_audio &= ~(3 << 12);                /* clear i2sin MCLK_SEL */
 333     cgu_audio |=  (AS3525_MCLK_SEL << 12);  /* set i2sin MCLK_SEL */
 334     cgu_audio &= ~(0x1ff << 14);            /* clear i2sin divider */
 335     cgu_audio |= mclk_divider() << 14;      /* set new i2sin divider */
 336     CGU_AUDIO = cgu_audio;                  /* write back register */
 337
 338     /* i2c clk src = I2SOUTIF, sdata src = AFE,
 339      * data valid at positive edge of SCLK */
 340     I2SIN_CONTROL = (1<<2);
 341     I2SIN_MASK = 0; /* disables all interrupts */
 342 }
 343
 344
 345 const void * pcm_rec_dma_get_peak_buffer(void)
 346 {
 347     pcm_rec_lock();
 348     int16_t *addr = AS3525_UNCACHED_ADDR((int16_t *)DMAC_CH_DST_ADDR(1));
 349     mono2stereo(addr);
 350     pcm_rec_unlock();
 351
 352     return addr;
 353 }
 354
 355 #endif /* HAVE_RECORDING */