1 dnl AMD64 mpn_mul_basecase.
3 dnl Contributed to the GNU project by Torbjorn Granlund
and David Harvey.
5 dnl Copyright
2008, 2012 Free Software Foundation
, Inc.
7 dnl
This file is part of the GNU MP Library.
9 dnl The GNU MP Library is free software
; you can redistribute it and/or modify
10 dnl it under the terms of
either:
12 dnl
* the GNU Lesser General
Public License as published by the Free
13 dnl Software Foundation
; either version 3 of the License, or (at your
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) any later version.
18 dnl
* the GNU General
Public License as published by the Free Software
19 dnl Foundation
; either version 2 of the License, or (at your option) any
22 dnl
or both
in parallel
, as here.
24 dnl The GNU MP Library is distributed
in the hope that it will be useful
, but
25 dnl WITHOUT ANY WARRANTY
; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
Public License
29 dnl You should have received copies of the GNU General
Public License
and the
30 dnl GNU Lesser General
Public License along with the GNU MP Library. If
not,
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https://www.gnu.
org/licenses
/.
33 include(`..
/config.m4
')
44 C The inner loops of this code are the result of running a code generation and
45 C optimization tool suite written by David Harvey and Torbjorn Granlund.
48 C * Use fewer registers. (how??? I can't see it
-- david
)
49 C
* Avoid some
"mov $0,r" and instead use
"xor r,r".
50 C
* Can the top of each L
(addmul_outer_n
) prologue be folded
into the
51 C mul_1
/mul_2 prologues
, saving a
LEA (%rip
)? It would slow down the
52 C case where vn
= 1 or 2; is it worth it?
57 define
(`un_param
',`%rdx')
70 define
(`outer_addr
', `%r14')
79 PROLOGUE
(mpn_mul_basecase
)
81 IFDOS
(`
mov 56(%rsp
), %r8d
')
93 sub un_param, un C rdx used by mul
95 mov R32(un_param), R32(w0)
97 lea (rp,un_param,8), rp
98 lea (up,un_param,8), up
105 C ===========================================================
106 C mul_1 for vp[0] if vn is odd
110 jz L(mul_1_prologue_0)
112 jc L(mul_1_prologue_1)
113 jz L(mul_1_prologue_2)
117 lea L(addmul_outer_3)(%rip), outer_addr
124 mov %rdx, w3 C note: already w0 == 0
125 lea L(addmul_outer_0)(%rip), outer_addr
135 lea L(addmul_outer_1)(%rip), outer_addr
144 lea L(addmul_outer_2)(%rip), outer_addr
153 C this loop is 10 c/loop = 2.5 c/l on K8, for all up/rp alignments
177 xor R32(w2), R32(w2) C zero
194 add $-1, vn C vn -= 1
200 lea 8(vp), vp C vp += 1
201 lea 8(rp), rp C rp += 1
205 C ===========================================================
206 C mul_2 for vp[0], vp[1] if vn is even
213 jz L(mul_2_prologue_0)
215 jz L(mul_2_prologue_2)
216 jc L(mul_2_prologue_1)
219 lea L(addmul_outer_3)(%rip), outer_addr
221 mov %rax, -16(rp,n,8)
225 mov -16(up,n,8), %rax
234 mov -24(up,n,8), %rax
235 lea L(addmul_outer_0)(%rip), outer_addr
243 lea L(addmul_outer_1)(%rip), outer_addr
249 lea L(addmul_outer_2)(%rip), outer_addr
257 C this loop is 18 c/loop = 2.25 c/l on K8, for all up/rp alignments
261 mov -32(up,n,8), %rax
265 mov -24(up,n,8), %rax
269 mov -24(up,n,8), %rax
277 mov -16(up,n,8), %rax
282 mov -16(up,n,8), %rax
296 adc R32(w1), R32(w0) C adc $0, w0
312 mov -32(up,n,8), %rax C FIXME: n is constant
319 add $-2, vn C vn -= 2
325 lea 16(vp), vp C vp += 2
326 lea 16(rp), rp C rp += 2
331 C ===========================================================
332 C addmul_2 for remaining vp's
334 C
in the following prologues
, we reuse un to store the
335 C adjusted value of n that is reloaded on each iteration
339 lea 0(%rip
), outer_addr
342 mov -24(up
,un
,8), %rax
345 mov -24(up
,un
,8), %rax
348 jmp L
(addmul_entry_0
)
358 jmp L
(addmul_entry_1
)
362 lea 0(%rip
), outer_addr
365 mov -8(up
,un
,8), %rax
371 mov -8(up
,un
,8), %rax
372 jmp L
(addmul_entry_2
)
376 lea 0(%rip
), outer_addr
379 mov -16(up
,un
,8), %rax
383 mov -16(up
,un
,8), %rax
385 jmp L
(addmul_entry_3
)
387 C
this loop is
19 c
/loop = 2.375 c
/l on K8
, for all up
/rp alignments
393 mov -24(up
,n
,8), %rax
398 mov -24(up
,n
,8), %rax
400 adc R32
(w2
), R32
(w2
) C
adc $0, w2
406 mov -16(up
,n
,8), %rax
410 mov -16(up
,n
,8), %rax
425 adc R32
(w1
), R32
(w0
) C
adc $0, w0
448 add $
-2, vn C vn
-= 2
451 lea 16(rp
), rp C rp
+= 2
452 lea 16(vp
), vp C vp
+= 2