3 * MIPS Technologies, Inc., California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Author: Nemanja Lukic (nlukic@mips.com)
32 #include "pixman-private.h"
33 #include "pixman-mips-dspr2-asm.h"
35 LEAF_MIPS_DSPR2(pixman_fill_buff16_mips)
39 * a2 - value to fill buffer with
44 beqz t1, 0f /* check if address is 4-byte aligned */
50 srl t1, a1, 5 /* t1 how many multiples of 32 bytes */
51 replv.ph a2, a2 /* replicate fill value (16bit) in a2 */
89 END(pixman_fill_buff16_mips)
91 LEAF_MIPS32R2(pixman_fill_buff32_mips)
95 * a2 - value to fill buffer with
100 srl t1, a1, 5 /* t1 how many multiples of 32 bytes */
138 END(pixman_fill_buff32_mips)
140 LEAF_MIPS_DSPR2(pixman_composite_src_8888_0565_asm_mips)
143 * a1 - src (a8r8g8b8)
161 CONVERT_2x8888_TO_2x0565 t0, t1, t2, t3, t4, t5, t6, t7, t8
174 CONVERT_1x8888_TO_1x0565 t0, t1, t2, t3
181 END(pixman_composite_src_8888_0565_asm_mips)
183 LEAF_MIPS_DSPR2(pixman_composite_src_0565_8888_asm_mips)
185 * a0 - dst (a8r8g8b8)
203 CONVERT_2x0565_TO_2x8888 t0, t1, t2, t3, t4, t5, t6, t7, t8, t9
216 CONVERT_1x0565_TO_1x8888 t0, t1, t2, t3
223 END(pixman_composite_src_0565_8888_asm_mips)
225 LEAF_MIPS_DSPR2(pixman_composite_src_x888_8888_asm_mips)
227 * a0 - dst (a8r8g8b8)
228 * a1 - src (x8r8g8b8)
235 srl t8, a2, 3 /* t1 = how many multiples of 8 src pixels */
236 beqz t8, 3f /* branch if less than 8 src pixels */
311 END(pixman_composite_src_x888_8888_asm_mips)
313 #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL)
314 LEAF_MIPS_DSPR2(pixman_composite_src_0888_8888_rev_asm_mips)
316 * a0 - dst (a8r8g8b8)
325 srl t9, a2, 2 /* t9 = how many multiples of 4 src pixels */
326 beqz t9, 4f /* branch if less than 4 src pixels */
343 lw t0, 0(a1) /* t0 = R2 | B1 | G1 | R1 */
344 lw t1, 4(a1) /* t1 = G3 | R3 | B2 | G2 */
345 lw t2, 8(a1) /* t2 = B4 | G4 | R4 | B3 */
350 wsbh t0, t0 /* t0 = B1 | R2 | R1 | G1 */
351 wsbh t1, t1 /* t1 = R3 | G3 | G2 | B2 */
352 wsbh t2, t2 /* t2 = G4 | B4 | B3 | R4 */
354 packrl.ph t3, t1, t0 /* t3 = G2 | B2 | B1 | R2 */
355 packrl.ph t4, t0, t0 /* t4 = R1 | G1 | B1 | R2 */
356 rotr t3, t3, 16 /* t3 = B1 | R2 | G2 | B2 */
357 or t3, t3, t8 /* t3 = FF | R2 | G2 | B2 */
358 srl t4, t4, 8 /* t4 = 0 | R1 | G1 | B1 */
359 or t4, t4, t8 /* t4 = FF | R1 | G1 | B1 */
360 packrl.ph t5, t2, t1 /* t5 = B3 | R4 | R3 | G3 */
361 rotr t5, t5, 24 /* t5 = R4 | R3 | G3 | B3 */
362 or t5, t5, t8 /* t5 = FF | R3 | G3 | B3 */
363 rotr t2, t2, 16 /* t2 = B3 | R4 | G4 | B4 */
364 or t2, t2, t8 /* t5 = FF | R3 | G3 | B3 */
374 lbu t6, 0(a1) /* t6 = 0 | 0 | 0 | R1 */
375 lhu t7, 1(a1) /* t7 = 0 | 0 | B1 | G1 */
376 sll t6, t6, 16 /* t6 = 0 | R1 | 0 | 0 */
377 wsbh t7, t7 /* t7 = 0 | 0 | G1 | B1 */
378 or t7, t6, t7 /* t7 = 0 | R1 | G1 | B1 */
382 lw t0, 3(a1) /* t0 = R3 | B2 | G2 | R2 */
383 lw t1, 7(a1) /* t1 = G4 | R4 | B3 | G3 */
384 lw t2, 11(a1) /* t2 = B5 | G5 | R5 | B4 */
389 wsbh t0, t0 /* t0 = B2 | R3 | R2 | G2 */
390 wsbh t1, t1 /* t1 = R4 | G4 | G3 | B3 */
391 wsbh t2, t2 /* t2 = G5 | B5 | B4 | R5 */
393 packrl.ph t3, t1, t0 /* t3 = G3 | B3 | B2 | R3 */
394 packrl.ph t4, t2, t1 /* t4 = B4 | R5 | R4 | G4 */
395 rotr t0, t0, 24 /* t0 = R3 | R2 | G2 | B2 */
396 rotr t3, t3, 16 /* t3 = B2 | R3 | G3 | B3 */
397 rotr t4, t4, 24 /* t4 = R5 | R4 | G4 | B4 */
398 or t7, t7, t8 /* t7 = FF | R1 | G1 | B1 */
399 or t0, t0, t8 /* t0 = FF | R2 | G2 | B2 */
400 or t3, t3, t8 /* t1 = FF | R3 | G3 | B3 */
401 or t4, t4, t8 /* t3 = FF | R4 | G4 | B4 */
407 rotr t7, t2, 16 /* t7 = xx | R5 | G5 | B5 */
412 lhu t7, 0(a1) /* t7 = 0 | 0 | G1 | R1 */
413 wsbh t7, t7 /* t7 = 0 | 0 | R1 | G1 */
417 lw t0, 2(a1) /* t0 = B2 | G2 | R2 | B1 */
418 lw t1, 6(a1) /* t1 = R4 | B3 | G3 | R3 */
419 lw t2, 10(a1) /* t2 = G5 | R5 | B4 | G4 */
424 wsbh t0, t0 /* t0 = G2 | B2 | B1 | R2 */
425 wsbh t1, t1 /* t1 = B3 | R4 | R3 | G3 */
426 wsbh t2, t2 /* t2 = R5 | G5 | G4 | B4 */
428 precr_sra.ph.w t7, t0, 0 /* t7 = R1 | G1 | B1 | R2 */
429 rotr t0, t0, 16 /* t0 = B1 | R2 | G2 | B2 */
430 packrl.ph t3, t2, t1 /* t3 = G4 | B4 | B3 | R4 */
431 rotr t1, t1, 24 /* t1 = R4 | R3 | G3 | B3 */
432 srl t7, t7, 8 /* t7 = 0 | R1 | G1 | B1 */
433 rotr t3, t3, 16 /* t3 = B3 | R4 | G4 | B4 */
434 or t7, t7, t8 /* t7 = FF | R1 | G1 | B1 */
435 or t0, t0, t8 /* t0 = FF | R2 | G2 | B2 */
436 or t1, t1, t8 /* t1 = FF | R3 | G3 | B3 */
437 or t3, t3, t8 /* t3 = FF | R4 | G4 | B4 */
443 srl t7, t2, 16 /* t7 = 0 | 0 | R5 | G5 */
448 lbu t7, 0(a1) /* t7 = 0 | 0 | 0 | R1 */
452 lw t0, 1(a1) /* t0 = G2 | R2 | B1 | G1 */
453 lw t1, 5(a1) /* t1 = B3 | G3 | R3 | B2 */
454 lw t2, 9(a1) /* t2 = R5 | B4 | G4 | R4 */
459 wsbh t0, t0 /* t0 = R2 | G2 | G1 | B1 */
460 wsbh t1, t1 /* t1 = G3 | B3 | B2 | R3 */
461 wsbh t2, t2 /* t2 = B4 | R5 | R4 | G4 */
463 precr_sra.ph.w t7, t0, 0 /* t7 = xx | R1 | G1 | B1 */
464 packrl.ph t3, t1, t0 /* t3 = B2 | R3 | R2 | G2 */
465 rotr t1, t1, 16 /* t1 = B2 | R3 | G3 | B3 */
466 rotr t4, t2, 24 /* t4 = R5 | R4 | G4 | B4 */
467 rotr t3, t3, 24 /* t3 = R3 | R2 | G2 | B2 */
468 or t7, t7, t8 /* t7 = FF | R1 | G1 | B1 */
469 or t3, t3, t8 /* t3 = FF | R2 | G2 | B2 */
470 or t1, t1, t8 /* t1 = FF | R3 | G3 | B3 */
471 or t4, t4, t8 /* t4 = FF | R4 | G4 | B4 */
477 srl t7, t2, 16 /* t7 = 0 | 0 | xx | R5 */
485 lbu t0, 0(a1) /* t0 = 0 | 0 | 0 | R */
486 lbu t1, 1(a1) /* t1 = 0 | 0 | 0 | G */
487 lbu t2, 2(a1) /* t2 = 0 | 0 | 0 | B */
490 sll t0, t0, 16 /* t2 = 0 | R | 0 | 0 */
491 sll t1, t1, 8 /* t1 = 0 | 0 | G | 0 */
493 or t2, t2, t1 /* t2 = 0 | 0 | G | B */
494 or t2, t2, t0 /* t2 = 0 | R | G | B */
495 or t2, t2, t8 /* t2 = FF | R | G | B */
505 END(pixman_composite_src_0888_8888_rev_asm_mips)
507 LEAF_MIPS_DSPR2(pixman_composite_src_0888_0565_rev_asm_mips)
514 SAVE_REGS_ON_STACK 0, v0, v1
521 srl t9, a2, 2 /* t9 = how many multiples of 4 src pixels */
522 beqz t9, 4f /* branch if less than 4 src pixels */
539 lw t0, 0(a1) /* t0 = R2 | B1 | G1 | R1 */
540 lw t1, 4(a1) /* t1 = G3 | R3 | B2 | G2 */
541 lw t2, 8(a1) /* t2 = B4 | G4 | R4 | B3 */
546 wsbh t0, t0 /* t0 = B1 | R2 | R1 | G1 */
547 wsbh t1, t1 /* t1 = R3 | G3 | G2 | B2 */
548 wsbh t2, t2 /* t2 = G4 | B4 | B3 | R4 */
550 packrl.ph t3, t1, t0 /* t3 = G2 | B2 | B1 | R2 */
551 packrl.ph t4, t0, t0 /* t4 = R1 | G1 | B1 | R2 */
552 rotr t3, t3, 16 /* t3 = B1 | R2 | G2 | B2 */
553 srl t4, t4, 8 /* t4 = 0 | R1 | G1 | B1 */
554 packrl.ph t5, t2, t1 /* t5 = B3 | R4 | R3 | G3 */
555 rotr t5, t5, 24 /* t5 = R4 | R3 | G3 | B3 */
556 rotr t2, t2, 16 /* t2 = B3 | R4 | G4 | B4 */
558 CONVERT_2x8888_TO_2x0565 t4, t3, t4, t3, t6, t7, t8, v0, v1
559 CONVERT_2x8888_TO_2x0565 t5, t2, t5, t2, t6, t7, t8, v0, v1
569 lbu t4, 0(a1) /* t4 = 0 | 0 | 0 | R1 */
570 lhu t5, 1(a1) /* t5 = 0 | 0 | B1 | G1 */
571 sll t4, t4, 16 /* t4 = 0 | R1 | 0 | 0 */
572 wsbh t5, t5 /* t5 = 0 | 0 | G1 | B1 */
573 or t5, t4, t5 /* t5 = 0 | R1 | G1 | B1 */
577 lw t0, 3(a1) /* t0 = R3 | B2 | G2 | R2 */
578 lw t1, 7(a1) /* t1 = G4 | R4 | B3 | G3 */
579 lw t2, 11(a1) /* t2 = B5 | G5 | R5 | B4 */
584 wsbh t0, t0 /* t0 = B2 | R3 | R2 | G2 */
585 wsbh t1, t1 /* t1 = R4 | G4 | G3 | B3 */
586 wsbh t2, t2 /* t2 = G5 | B5 | B4 | R5 */
588 packrl.ph t3, t1, t0 /* t3 = G3 | B3 | B2 | R3 */
589 packrl.ph t4, t2, t1 /* t4 = B4 | R5 | R4 | G4 */
590 rotr t0, t0, 24 /* t0 = R3 | R2 | G2 | B2 */
591 rotr t3, t3, 16 /* t3 = B2 | R3 | G3 | B3 */
592 rotr t4, t4, 24 /* t4 = R5 | R4 | G4 | B4 */
594 CONVERT_2x8888_TO_2x0565 t5, t0, t5, t0, t6, t7, t8, v0, v1
595 CONVERT_2x8888_TO_2x0565 t3, t4, t3, t4, t6, t7, t8, v0, v1
601 rotr t5, t2, 16 /* t5 = xx | R5 | G5 | B5 */
606 lhu t5, 0(a1) /* t5 = 0 | 0 | G1 | R1 */
607 wsbh t5, t5 /* t5 = 0 | 0 | R1 | G1 */
611 lw t0, 2(a1) /* t0 = B2 | G2 | R2 | B1 */
612 lw t1, 6(a1) /* t1 = R4 | B3 | G3 | R3 */
613 lw t2, 10(a1) /* t2 = G5 | R5 | B4 | G4 */
618 wsbh t0, t0 /* t0 = G2 | B2 | B1 | R2 */
619 wsbh t1, t1 /* t1 = B3 | R4 | R3 | G3 */
620 wsbh t2, t2 /* t2 = R5 | G5 | G4 | B4 */
622 precr_sra.ph.w t5, t0, 0 /* t5 = R1 | G1 | B1 | R2 */
623 rotr t0, t0, 16 /* t0 = B1 | R2 | G2 | B2 */
624 packrl.ph t3, t2, t1 /* t3 = G4 | B4 | B3 | R4 */
625 rotr t1, t1, 24 /* t1 = R4 | R3 | G3 | B3 */
626 srl t5, t5, 8 /* t5 = 0 | R1 | G1 | B1 */
627 rotr t3, t3, 16 /* t3 = B3 | R4 | G4 | B4 */
629 CONVERT_2x8888_TO_2x0565 t5, t0, t5, t0, t6, t7, t8, v0, v1
630 CONVERT_2x8888_TO_2x0565 t1, t3, t1, t3, t6, t7, t8, v0, v1
636 srl t5, t2, 16 /* t5 = 0 | 0 | R5 | G5 */
641 lbu t5, 0(a1) /* t5 = 0 | 0 | 0 | R1 */
645 lw t0, 1(a1) /* t0 = G2 | R2 | B1 | G1 */
646 lw t1, 5(a1) /* t1 = B3 | G3 | R3 | B2 */
647 lw t2, 9(a1) /* t2 = R5 | B4 | G4 | R4 */
652 wsbh t0, t0 /* t0 = R2 | G2 | G1 | B1 */
653 wsbh t1, t1 /* t1 = G3 | B3 | B2 | R3 */
654 wsbh t2, t2 /* t2 = B4 | R5 | R4 | G4 */
656 precr_sra.ph.w t5, t0, 0 /* t5 = xx | R1 | G1 | B1 */
657 packrl.ph t3, t1, t0 /* t3 = B2 | R3 | R2 | G2 */
658 rotr t1, t1, 16 /* t1 = B2 | R3 | G3 | B3 */
659 rotr t4, t2, 24 /* t4 = R5 | R4 | G4 | B4 */
660 rotr t3, t3, 24 /* t3 = R3 | R2 | G2 | B2 */
662 CONVERT_2x8888_TO_2x0565 t5, t3, t5, t3, t6, t7, t8, v0, v1
663 CONVERT_2x8888_TO_2x0565 t1, t4, t1, t4, t6, t7, t8, v0, v1
669 srl t5, t2, 16 /* t5 = 0 | 0 | xx | R5 */
677 lbu t0, 0(a1) /* t0 = 0 | 0 | 0 | R */
678 lbu t1, 1(a1) /* t1 = 0 | 0 | 0 | G */
679 lbu t2, 2(a1) /* t2 = 0 | 0 | 0 | B */
682 sll t0, t0, 16 /* t2 = 0 | R | 0 | 0 */
683 sll t1, t1, 8 /* t1 = 0 | 0 | G | 0 */
685 or t2, t2, t1 /* t2 = 0 | 0 | G | B */
686 or t2, t2, t0 /* t2 = 0 | R | G | B */
688 CONVERT_1x8888_TO_1x0565 t2, t3, t4, t5
695 RESTORE_REGS_FROM_STACK 0, v0, v1
699 END(pixman_composite_src_0888_0565_rev_asm_mips)
702 LEAF_MIPS_DSPR2(pixman_composite_src_pixbuf_8888_asm_mips)
704 * a0 - dst (a8b8g8r8)
705 * a1 - src (a8r8g8b8)
709 SAVE_REGS_ON_STACK 0, v0
725 MIPS_2xUN8x4_MUL_2xUN8 t0, t1, t2, t3, t0, t1, v0, t4, t5, t6, t7, t8, t9
749 MIPS_UN8x4_MUL_UN8 t0, t1, t0, v0, t3, t4, t5
758 RESTORE_REGS_FROM_STACK 0, v0
762 END(pixman_composite_src_pixbuf_8888_asm_mips)
764 LEAF_MIPS_DSPR2(pixman_composite_src_rpixbuf_8888_asm_mips)
766 * a0 - dst (a8r8g8b8)
767 * a1 - src (a8r8g8b8)
771 SAVE_REGS_ON_STACK 0, v0
787 MIPS_2xUN8x4_MUL_2xUN8 t0, t1, t2, t3, t0, t1, v0, t4, t5, t6, t7, t8, t9
809 MIPS_UN8x4_MUL_UN8 t0, t1, t0, v0, t3, t4, t5
817 RESTORE_REGS_FROM_STACK 0, v0
821 END(pixman_composite_src_rpixbuf_8888_asm_mips)
823 LEAF_MIPS_DSPR2(pixman_composite_src_n_8_8888_asm_mips)
825 * a0 - dst (a8r8g8b8)
826 * a1 - src (32bit constant)
832 SAVE_REGS_ON_STACK 0, v0
842 /* a1 = source (32bit constant) */
843 lbu t0, 0(a2) /* t2 = mask (a8) */
844 lbu t1, 1(a2) /* t3 = mask (a8) */
847 MIPS_2xUN8x4_MUL_2xUN8 a1, a1, t0, t1, t2, t3, v0, t4, t5, t6, t7, t8, t9
863 MIPS_UN8x4_MUL_UN8 a1, t0, t1, v0, t3, t4, t5
870 RESTORE_REGS_FROM_STACK 0, v0
874 END(pixman_composite_src_n_8_8888_asm_mips)
876 LEAF_MIPS_DSPR2(pixman_composite_src_n_8_8_asm_mips)
879 * a1 - src (32bit constant)
887 srl t7, a3, 2 /* t7 = how many multiples of 4 dst pixels */
888 beqz t7, 1f /* branch if less than 4 src pixels */
904 precr_sra.ph.w t1, t0, 0
905 precr_sra.ph.w t3, t2, 0
906 precr.qb.ph t0, t3, t1
908 muleu_s.ph.qbl t2, t0, t8
909 muleu_s.ph.qbr t3, t0, t8
918 precr.qb.ph t2, t2, t3
954 END(pixman_composite_src_n_8_8_asm_mips)
956 LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_8888_ca_asm_mips)
958 * a0 - dst (a8r8g8b8)
959 * a1 - src (32bit constant)
960 * a2 - mask (a8r8g8b8)
966 SAVE_REGS_ON_STACK 8, s0, s1, s2, s3, s4, s5
969 addiu t7, zero, -1 /* t7 = 0xffffffff */
970 srl t8, a1, 24 /* t8 = srca */
974 beqz t1, 4f /* last pixel */
978 lw t0, 0(a2) /* t0 = mask */
979 lw t1, 4(a2) /* t1 = mask */
980 addiu a3, a3, -2 /* w = w - 2 */
982 beqz t2, 3f /* if (t0 == 0) && (t1 == 0) */
985 beq t2, t7, 1f /* if (t0 == 0xffffffff) && (t1 == 0xffffffff) */
989 lw t2, 0(a0) /* t2 = dst */
990 lw t3, 4(a0) /* t3 = dst */
991 MIPS_2xUN8x4_MUL_2xUN8x4 a1, a1, t0, t1, t4, t5, t9, s0, s1, s2, s3, s4, s5
992 MIPS_2xUN8x4_MUL_2xUN8 t0, t1, t8, t8, t0, t1, t9, s0, s1, s2, s3, s4, s5
995 MIPS_2xUN8x4_MUL_2xUN8x4 t2, t3, t0, t1, t2, t3, t9, s0, s1, s2, s3, s4, s5
1006 //if (t0 == 0xffffffff) && (t1 == 0xffffffff):
1007 beq t8, t6, 2f /* if (srca == 0xff) */
1009 lw t2, 0(a0) /* t2 = dst */
1010 lw t3, 4(a0) /* t3 = dst */
1015 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, t0, t1, t2, t3, t9, s0, s1, s2, s3, s4, s5
1016 addu_s.qb t2, a1, t2
1017 addu_s.qb t3, a1, t3
1037 lw t0, 0(a2) /* t0 = mask */
1038 beqz t0, 7f /* if (t0 == 0) */
1040 beq t0, t7, 5f /* if (t0 == 0xffffffff) */
1043 lw t1, 0(a0) /* t1 = dst */
1044 MIPS_UN8x4_MUL_UN8x4 a1, t0, t2, t9, t3, t4, t5, s0
1045 MIPS_UN8x4_MUL_UN8 t0, t8, t0, t9, t3, t4, t5
1047 MIPS_UN8x4_MUL_UN8x4 t1, t0, t1, t9, t3, t4, t5, s0
1048 addu_s.qb t1, t2, t1
1050 RESTORE_REGS_FROM_STACK 8, s0, s1, s2, s3, s4, s5
1054 //if (t0 == 0xffffffff)
1055 beq t8, t6, 6f /* if (srca == 0xff) */
1057 lw t1, 0(a0) /* t1 = dst */
1060 MIPS_UN8x4_MUL_UN8 t1, t0, t1, t9, t2, t3, t4
1061 addu_s.qb t1, a1, t1
1063 RESTORE_REGS_FROM_STACK 8, s0, s1, s2, s3, s4, s5
1069 RESTORE_REGS_FROM_STACK 8, s0, s1, s2, s3, s4, s5
1074 END(pixman_composite_over_n_8888_8888_ca_asm_mips)
1076 LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_0565_ca_asm_mips)
1079 * a1 - src (32bit constant)
1080 * a2 - mask (a8r8g8b8)
1086 SAVE_REGS_ON_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7, s8
1089 addiu t7, zero, -1 /* t7 = 0xffffffff */
1090 srl t8, a1, 24 /* t8 = srca */
1097 beqz t1, 4f /* last pixel */
1101 lw t0, 0(a2) /* t0 = mask */
1102 lw t1, 4(a2) /* t1 = mask */
1103 addiu a3, a3, -2 /* w = w - 2 */
1105 beqz t2, 3f /* if (t0 == 0) && (t1 == 0) */
1108 beq t2, t7, 1f /* if (t0 == 0xffffffff) && (t1 == 0xffffffff) */
1112 lhu t2, 0(a0) /* t2 = dst */
1113 lhu t3, 2(a0) /* t3 = dst */
1114 MIPS_2xUN8x4_MUL_2xUN8x4 a1, a1, t0, t1, t4, t5, t9, s0, s1, s2, s3, s4, s5
1115 MIPS_2xUN8x4_MUL_2xUN8 t0, t1, t8, t8, t0, t1, t9, s0, s1, s2, s3, s4, s5
1118 CONVERT_2x0565_TO_2x8888 t2, t3, t2, t3, s7, s8, s0, s1, s2, s3
1119 MIPS_2xUN8x4_MUL_2xUN8x4 t2, t3, t0, t1, t2, t3, t9, s0, s1, s2, s3, s4, s5
1120 addu_s.qb t2, t4, t2
1121 addu_s.qb t3, t5, t3
1122 CONVERT_2x8888_TO_2x0565 t2, t3, t2, t3, s6, s7, s8, s0, s1
1131 //if (t0 == 0xffffffff) && (t1 == 0xffffffff):
1132 beq t8, t6, 2f /* if (srca == 0xff) */
1134 lhu t2, 0(a0) /* t2 = dst */
1135 lhu t3, 2(a0) /* t3 = dst */
1140 CONVERT_2x0565_TO_2x8888 t2, t3, t2, t3, s7, s8, s0, s1, s2, s3
1141 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, t0, t1, t2, t3, t9, s0, s1, s2, s3, s4, s5
1142 addu_s.qb t2, a1, t2
1143 addu_s.qb t3, a1, t3
1144 CONVERT_2x8888_TO_2x0565 t2, t3, t2, t3, s6, s7, s8, s0, s1
1153 CONVERT_1x8888_TO_1x0565 a1, t2, s0, s1
1165 lw t0, 0(a2) /* t0 = mask */
1166 beqz t0, 7f /* if (t0 == 0) */
1168 beq t0, t7, 5f /* if (t0 == 0xffffffff) */
1171 lhu t1, 0(a0) /* t1 = dst */
1172 MIPS_UN8x4_MUL_UN8x4 a1, t0, t2, t9, t3, t4, t5, s0
1173 MIPS_UN8x4_MUL_UN8 t0, t8, t0, t9, t3, t4, t5
1175 CONVERT_1x0565_TO_1x8888 t1, s1, s2, s3
1176 MIPS_UN8x4_MUL_UN8x4 s1, t0, s1, t9, t3, t4, t5, s0
1177 addu_s.qb s1, t2, s1
1178 CONVERT_1x8888_TO_1x0565 s1, t1, s0, s2
1180 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7, s8
1184 //if (t0 == 0xffffffff)
1185 beq t8, t6, 6f /* if (srca == 0xff) */
1187 lhu t1, 0(a0) /* t1 = dst */
1190 CONVERT_1x0565_TO_1x8888 t1, s1, s2, s3
1191 MIPS_UN8x4_MUL_UN8 s1, t0, s1, t9, t2, t3, t4
1192 addu_s.qb s1, a1, s1
1193 CONVERT_1x8888_TO_1x0565 s1, t1, s0, s2
1195 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7, s8
1199 CONVERT_1x8888_TO_1x0565 a1, t1, s0, s2
1202 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7, s8
1207 END(pixman_composite_over_n_8888_0565_ca_asm_mips)
1209 LEAF_MIPS_DSPR2(pixman_composite_over_n_8_8_asm_mips)
1212 * a1 - src (32bit constant)
1217 SAVE_REGS_ON_STACK 0, v0
1221 srl v0, a3, 2 /* v0 = how many multiples of 4 dst pixels */
1222 beqz v0, 1f /* branch if less than 4 src pixels */
1242 precr_sra.ph.w t1, t0, 0
1243 precr_sra.ph.w t3, t2, 0
1244 precr_sra.ph.w t5, t4, 0
1245 precr_sra.ph.w t7, t6, 0
1247 precr.qb.ph t0, t3, t1
1248 precr.qb.ph t1, t7, t5
1250 muleu_s.ph.qbl t2, t0, t8
1251 muleu_s.ph.qbr t3, t0, t8
1260 precr.qb.ph t0, t2, t3
1263 preceu.ph.qbl t7, t6
1264 preceu.ph.qbr t6, t6
1266 muleu_s.ph.qbl t2, t1, t7
1267 muleu_s.ph.qbr t3, t1, t6
1276 precr.qb.ph t1, t2, t3
1278 addu_s.qb t2, t0, t1
1316 addu_s.qb t2, t2, t4
1323 RESTORE_REGS_FROM_STACK 0, v0
1327 END(pixman_composite_over_n_8_8_asm_mips)
1329 LEAF_MIPS_DSPR2(pixman_composite_over_n_8_8888_asm_mips)
1331 * a0 - dst (a8r8g8b8)
1332 * a1 - src (32bit constant)
1337 SAVE_REGS_ON_STACK 4, s0, s1, s2, s3, s4
1343 beqz t0, 3f /* last pixel */
1344 srl t6, a1, 24 /* t6 = srca */
1346 beq t5, t6, 2f /* if (srca == 0xff) */
1350 lbu t0, 0(a2) /* t0 = mask */
1351 lbu t1, 1(a2) /* t1 = mask */
1353 beqz t2, 111f /* if (t0 == 0) && (t1 == 0) */
1357 lw t2, 0(a0) /* t2 = dst */
1358 beq t3, t5, 11f /* if (t0 == 0xff) && (t1 == 0xff) */
1359 lw t3, 4(a0) /* t3 = dst */
1361 MIPS_2xUN8x4_MUL_2xUN8 a1, a1, t0, t1, s0, s1, t4, t6, t7, t8, t9, s2, s3
1366 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, s2, s3, t2, t3, t4, t0, t1, t6, t7, t8, t9
1367 addu_s.qb s2, t2, s0
1368 addu_s.qb s3, t3, s1
1373 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, s4, s4, t2, t3, t4, t0, t1, t6, t7, t8, t9
1374 addu_s.qb s2, t2, a1
1375 addu_s.qb s3, t3, a1
1388 lbu t0, 0(a2) /* t0 = mask */
1389 lbu t1, 1(a2) /* t1 = mask */
1391 beqz t2, 222f /* if (t0 == 0) && (t1 == 0) */
1394 beq t3, t5, 22f /* if (t0 == 0xff) && (t1 == 0xff) */
1396 lw t2, 0(a0) /* t2 = dst */
1397 lw t3, 4(a0) /* t3 = dst */
1399 OVER_2x8888_2x8_2x8888 a1, a1, t0, t1, t2, t3, \
1400 t6, t7, t4, t8, t9, s0, s1, s2, s3
1416 lbu t0, 0(a2) /* t0 = mask */
1417 beqz t0, 4f /* if (t0 == 0) */
1420 beq t0, t5, 31f /* if (t0 == 0xff) */
1421 lw t1, 0(a0) /* t1 = dst */
1423 MIPS_UN8x4_MUL_UN8 a1, t0, t3, t4, t6, t7, t8
1427 MIPS_UN8x4_MUL_UN8 t1, t2, t1, t4, t6, t7, t8
1428 addu_s.qb t2, t1, t3
1431 RESTORE_REGS_FROM_STACK 4, s0, s1, s2, s3, s4
1435 END(pixman_composite_over_n_8_8888_asm_mips)
1437 LEAF_MIPS_DSPR2(pixman_composite_over_n_8_0565_asm_mips)
1440 * a1 - src (32bit constant)
1444 SAVE_REGS_ON_STACK 24, v0, s0, s1, s2, s3, s4, s5, s6, s7, s8
1453 beqz t1, 3f /* last pixel */
1454 srl t0, a1, 24 /* t0 = srca */
1456 beq t0, t5, 2f /* if (srca == 0xff) */
1460 lbu t0, 0(a2) /* t0 = mask */
1461 lbu t1, 1(a2) /* t1 = mask */
1463 beqz t2, 111f /* if (t0 == 0) && (t1 == 0) */
1465 lhu t2, 0(a0) /* t2 = dst */
1466 lhu t3, 2(a0) /* t3 = dst */
1467 CONVERT_2x0565_TO_2x8888 t2, t3, s0, s1, t7, t8, t9, s2, s3, s4
1469 beq t9, t5, 11f /* if (t0 == 0xff) && (t1 == 0xff) */
1472 MIPS_2xUN8x4_MUL_2xUN8 a1, a1, t0, t1, s2, s3, t4, t9, s4, s5, s6, s7, s8
1477 MIPS_2xUN8x4_MUL_2xUN8 s0, s1, s4, s5, s0, s1, t4, t9, t0, t1, s6, s7, s8
1478 addu_s.qb s4, s2, s0
1479 addu_s.qb s5, s3, s1
1480 CONVERT_2x8888_TO_2x0565 s4, s5, t2, t3, t6, t7, t8, s0, s1
1485 MIPS_2xUN8x4_MUL_2xUN8 s0, s1, v0, v0, s0, s1, t4, t9, t0, t1, s6, s7, s8
1486 addu_s.qb s4, a1, s0
1487 addu_s.qb s5, a1, s1
1488 CONVERT_2x8888_TO_2x0565 s4, s5, t2, t3, t6, t7, t8, s0, s1
1499 CONVERT_1x8888_TO_1x0565 a1, s0, s1, s2
1502 lbu t0, 0(a2) /* t0 = mask */
1503 lbu t1, 1(a2) /* t1 = mask */
1505 beqz t2, 222f /* if (t0 == 0) && (t1 == 0) */
1509 beq t9, t5, 22f /* if (t0 == 0xff) && (t2 == 0xff) */
1511 lhu t2, 0(a0) /* t2 = dst */
1512 lhu t3, 2(a0) /* t3 = dst */
1514 CONVERT_2x0565_TO_2x8888 t2, t3, s2, s3, t7, t8, s4, s5, s6, s7
1515 OVER_2x8888_2x8_2x8888 a1, a1, t0, t1, s2, s3, \
1516 t2, t3, t4, t9, s4, s5, s6, s7, s8
1517 CONVERT_2x8888_TO_2x0565 t2, t3, s2, s3, t6, t7, t8, s4, s5
1530 lbu t0, 0(a2) /* t0 = mask */
1531 beqz t0, 4f /* if (t0 == 0) */
1533 lhu t1, 0(a0) /* t1 = dst */
1534 CONVERT_1x0565_TO_1x8888 t1, t2, t3, t7
1535 beq t0, t5, 31f /* if (t0 == 0xff) */
1538 MIPS_UN8x4_MUL_UN8 a1, t0, t3, t4, t7, t8, t9
1542 MIPS_UN8x4_MUL_UN8 t2, t6, t2, t4, t7, t8, t9
1543 addu_s.qb t1, t2, t3
1544 CONVERT_1x8888_TO_1x0565 t1, t2, t3, t7
1547 RESTORE_REGS_FROM_STACK 24, v0, s0, s1, s2, s3, s4, s5, s6, s7, s8
1551 END(pixman_composite_over_n_8_0565_asm_mips)
1553 LEAF_MIPS_DSPR2(pixman_composite_over_8888_n_8888_asm_mips)
1555 * a0 - dst (a8r8g8b8)
1556 * a1 - src (a8r8g8b8)
1557 * a2 - mask (32bit constant)
1561 SAVE_REGS_ON_STACK 0, s0
1571 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1572 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
1573 /* a2 = mask (32bit constant) */
1574 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
1575 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
1578 OVER_2x8888_2x8_2x8888 t0, t1, a2, a2, t2, t3, \
1579 t5, t6, t4, t7, t8, t9, t0, t1, s0
1590 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1591 /* a2 = mask (32bit constant) */
1592 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
1594 OVER_8888_8_8888 t0, a2, t1, t3, t4, t5, t6, t7, t8
1598 RESTORE_REGS_FROM_STACK 0, s0
1602 END(pixman_composite_over_8888_n_8888_asm_mips)
1604 LEAF_MIPS_DSPR2(pixman_composite_over_8888_n_0565_asm_mips)
1607 * a1 - src (a8r8g8b8)
1608 * a2 - mask (32bit constant)
1612 SAVE_REGS_ON_STACK 0, s0, s1, s2, s3
1624 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1625 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
1626 /* a2 = mask (32bit constant) */
1627 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
1628 lhu t3, 2(a0) /* t2 = destination (r5g6b5) */
1631 CONVERT_2x0565_TO_2x8888 t2, t3, t4, t5, t8, t9, s0, s1, t2, t3
1632 OVER_2x8888_2x8_2x8888 t0, t1, a2, a2, t4, t5, \
1633 t2, t3, t6, t0, t1, s0, s1, s2, s3
1634 CONVERT_2x8888_TO_2x0565 t2, t3, t4, t5, t7, t8, t9, s0, s1
1645 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1646 /* a2 = mask (32bit constant) */
1647 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
1649 CONVERT_1x0565_TO_1x8888 t1, t2, t4, t5
1650 OVER_8888_8_8888 t0, a2, t2, t1, t6, t3, t4, t5, t7
1651 CONVERT_1x8888_TO_1x0565 t1, t3, t4, t5
1655 RESTORE_REGS_FROM_STACK 0, s0, s1, s2, s3
1659 END(pixman_composite_over_8888_n_0565_asm_mips)
1661 LEAF_MIPS_DSPR2(pixman_composite_over_0565_n_0565_asm_mips)
1665 * a2 - mask (32bit constant)
1669 SAVE_REGS_ON_STACK 20, s0, s1, s2, s3, s4, s5
1681 lhu t0, 0(a1) /* t0 = source (r5g6b5) */
1682 lhu t1, 2(a1) /* t1 = source (r5g6b5) */
1683 /* a2 = mask (32bit constant) */
1684 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
1685 lhu t3, 2(a0) /* t3 = destination (r5g6b5) */
1688 CONVERT_2x0565_TO_2x8888 t0, t1, t4, t5, t8, t9, s0, s1, s2, s3
1689 CONVERT_2x0565_TO_2x8888 t2, t3, s0, s1, t8, t9, s2, s3, s4, s5
1690 OVER_2x8888_2x8_2x8888 t4, t5, a2, a2, s0, s1, \
1691 t0, t1, t6, s2, s3, s4, s5, t4, t5
1692 CONVERT_2x8888_TO_2x0565 t0, t1, s0, s1, t7, t8, t9, s2, s3
1703 lhu t0, 0(a1) /* t0 = source (r5g6b5) */
1704 /* a2 = mask (32bit constant) */
1705 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
1707 CONVERT_1x0565_TO_1x8888 t0, t2, t4, t5
1708 CONVERT_1x0565_TO_1x8888 t1, t3, t4, t5
1709 OVER_8888_8_8888 t2, a2, t3, t0, t6, t1, t4, t5, t7
1710 CONVERT_1x8888_TO_1x0565 t0, t3, t4, t5
1714 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5
1718 END(pixman_composite_over_0565_n_0565_asm_mips)
1720 LEAF_MIPS_DSPR2(pixman_composite_over_8888_8_8888_asm_mips)
1722 * a0 - dst (a8r8g8b8)
1723 * a1 - src (a8r8g8b8)
1728 SAVE_REGS_ON_STACK 0, s0, s1
1736 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1737 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
1738 lbu t2, 0(a2) /* t2 = mask (a8) */
1739 lbu t3, 1(a2) /* t3 = mask (a8) */
1740 lw t5, 0(a0) /* t5 = destination (a8r8g8b8) */
1741 lw t6, 4(a0) /* t6 = destination (a8r8g8b8) */
1745 OVER_2x8888_2x8_2x8888 t0, t1, t2, t3, t5, t6, \
1746 t7, t8, t4, t9, s0, s1, t0, t1, t2
1757 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1758 lbu t1, 0(a2) /* t1 = mask (a8) */
1759 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
1761 OVER_8888_8_8888 t0, t1, t2, t3, t4, t5, t6, t7, t8
1765 RESTORE_REGS_FROM_STACK 0, s0, s1
1769 END(pixman_composite_over_8888_8_8888_asm_mips)
1771 LEAF_MIPS_DSPR2(pixman_composite_over_8888_8_0565_asm_mips)
1774 * a1 - src (a8r8g8b8)
1779 SAVE_REGS_ON_STACK 20, s0, s1, s2, s3, s4, s5
1790 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1791 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
1792 lbu t2, 0(a2) /* t2 = mask (a8) */
1793 lbu t3, 1(a2) /* t3 = mask (a8) */
1794 lhu t4, 0(a0) /* t4 = destination (r5g6b5) */
1795 lhu t5, 2(a0) /* t5 = destination (r5g6b5) */
1799 CONVERT_2x0565_TO_2x8888 t4, t5, s0, s1, t8, t9, s2, s3, s4, s5
1800 OVER_2x8888_2x8_2x8888 t0, t1, t2, t3, s0, s1, \
1801 t4, t5, t6, s2, s3, s4, s5, t0, t1
1802 CONVERT_2x8888_TO_2x0565 t4, t5, s0, s1, t7, t8, t9, s2, s3
1813 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1814 lbu t1, 0(a2) /* t1 = mask (a8) */
1815 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
1817 CONVERT_1x0565_TO_1x8888 t2, t3, t4, t5
1818 OVER_8888_8_8888 t0, t1, t3, t2, t6, t4, t5, t7, t8
1819 CONVERT_1x8888_TO_1x0565 t2, t3, t4, t5
1823 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5
1827 END(pixman_composite_over_8888_8_0565_asm_mips)
1829 LEAF_MIPS_DSPR2(pixman_composite_over_0565_8_0565_asm_mips)
1837 SAVE_REGS_ON_STACK 20, s0, s1, s2, s3, s4, s5
1848 lhu t0, 0(a1) /* t0 = source (r5g6b5) */
1849 lhu t1, 2(a1) /* t1 = source (r5g6b5) */
1850 lbu t2, 0(a2) /* t2 = mask (a8) */
1851 lbu t3, 1(a2) /* t3 = mask (a8) */
1852 lhu t8, 0(a0) /* t8 = destination (r5g6b5) */
1853 lhu t9, 2(a0) /* t9 = destination (r5g6b5) */
1857 CONVERT_2x0565_TO_2x8888 t0, t1, s0, s1, t5, t6, s2, s3, s4, s5
1858 CONVERT_2x0565_TO_2x8888 t8, t9, s2, s3, t5, t6, s4, s5, t0, t1
1859 OVER_2x8888_2x8_2x8888 s0, s1, t2, t3, s2, s3, \
1860 t0, t1, t7, s4, s5, t8, t9, s0, s1
1861 CONVERT_2x8888_TO_2x0565 t0, t1, s0, s1, t4, t5, t6, s2, s3
1872 lhu t0, 0(a1) /* t0 = source (r5g6b5) */
1873 lbu t1, 0(a2) /* t1 = mask (a8) */
1874 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
1876 CONVERT_1x0565_TO_1x8888 t0, t3, t4, t5
1877 CONVERT_1x0565_TO_1x8888 t2, t4, t5, t6
1878 OVER_8888_8_8888 t3, t1, t4, t0, t7, t2, t5, t6, t8
1879 CONVERT_1x8888_TO_1x0565 t0, t3, t4, t5
1883 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5
1887 END(pixman_composite_over_0565_8_0565_asm_mips)
1889 LEAF_MIPS_DSPR2(pixman_composite_over_8888_8888_8888_asm_mips)
1891 * a0 - dst (a8r8g8b8)
1892 * a1 - src (a8r8g8b8)
1893 * a2 - mask (a8r8g8b8)
1897 SAVE_REGS_ON_STACK 0, s0, s1, s2
1905 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1906 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
1907 lw t2, 0(a2) /* t2 = mask (a8r8g8b8) */
1908 lw t3, 4(a2) /* t3 = mask (a8r8g8b8) */
1909 lw t5, 0(a0) /* t5 = destination (a8r8g8b8) */
1910 lw t6, 4(a0) /* t6 = destination (a8r8g8b8) */
1916 OVER_2x8888_2x8_2x8888 t0, t1, t2, t3, t5, t6, t7, t8, t4, t9, s0, s1, s2, t0, t1
1927 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1928 lw t1, 0(a2) /* t1 = mask (a8r8g8b8) */
1929 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
1932 OVER_8888_8_8888 t0, t1, t2, t3, t4, t5, t6, t7, t8
1936 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
1940 END(pixman_composite_over_8888_8888_8888_asm_mips)
1942 LEAF_MIPS_DSPR2(pixman_composite_over_8888_8888_asm_mips)
1944 * a0 - dst (a8r8g8b8)
1945 * a1 - src (a8r8g8b8)
1949 SAVE_REGS_ON_STACK 0, s0, s1, s2
1957 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1958 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
1959 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
1960 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
1973 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, t5, t6, t7, t8, t4, t9, s0, s1, s2, t2, t3
1975 addu_s.qb t0, t7, t0
1976 addu_s.qb t1, t8, t1
1989 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
1990 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
2000 MIPS_UN8x4_MUL_UN8 t1, t2, t3, t4, t5, t6, t7
2002 addu_s.qb t0, t3, t0
2007 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2011 END(pixman_composite_over_8888_8888_asm_mips)
2013 LEAF_MIPS_DSPR2(pixman_composite_over_8888_0565_asm_mips)
2016 * a1 - src (a8r8g8b8)
2020 SAVE_REGS_ON_STACK 8, s0, s1, s2, s3, s4, s5
2031 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2032 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
2033 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
2034 lhu t3, 2(a0) /* t3 = destination (r5g6b5) */
2047 CONVERT_2x0565_TO_2x8888 t2, t3, s0, s1, s4, s5, t7, t8, t9, s2
2048 MIPS_2xUN8x4_MUL_2xUN8 s0, s1, t5, t6, t7, t8, t4, t9, t2, t3, s2, s0, s1
2050 addu_s.qb t0, t7, t0
2051 addu_s.qb t1, t8, t1
2053 CONVERT_2x8888_TO_2x0565 t0, t1, t7, t8, s3, s4, s5, t2, t3
2065 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2066 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
2076 CONVERT_1x0565_TO_1x8888 t1, s0, t8, t9
2077 MIPS_UN8x4_MUL_UN8 s0, t2, t3, t4, t5, t6, t7
2079 addu_s.qb t0, t3, t0
2081 CONVERT_1x8888_TO_1x0565 t0, s0, t8, t9
2085 RESTORE_REGS_FROM_STACK 8, s0, s1, s2, s3, s4, s5
2089 END(pixman_composite_over_8888_0565_asm_mips)
2091 LEAF_MIPS_DSPR2(pixman_composite_over_n_0565_asm_mips)
2094 * a1 - src (32bit constant)
2105 CONVERT_1x8888_TO_1x0565 a1, t1, t2, t3
2115 SAVE_REGS_ON_STACK 0, s0, s1, s2
2124 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
2125 lhu t2, 2(a0) /* t2 = destination (r5g6b5) */
2127 CONVERT_2x0565_TO_2x8888 t1, t2, t3, t8, t6, t7, t9, s0, s1, s2
2128 MIPS_2xUN8x4_MUL_2xUN8 t3, t8, t0, t0, t1, t2, t4, t9, s0, s1, s2, t3, t8
2129 addu_s.qb t1, t1, a1
2130 addu_s.qb t2, t2, a1
2131 CONVERT_2x8888_TO_2x0565 t1, t2, t3, t8, t5, t6, t7, s0, s1
2144 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
2146 CONVERT_1x0565_TO_1x8888 t1, t2, s0, s1
2147 MIPS_UN8x4_MUL_UN8 t2, t0, t1, t4, s0, s1, s2
2148 addu_s.qb t1, t1, a1
2149 CONVERT_1x8888_TO_1x0565 t1, t2, s0, s1
2154 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2159 END(pixman_composite_over_n_0565_asm_mips)
2161 LEAF_MIPS_DSPR2(pixman_composite_over_n_8888_asm_mips)
2163 * a0 - dst (a8r8g8b8)
2164 * a1 - src (32bit constant)
2184 SAVE_REGS_ON_STACK 0, s0, s1, s2
2190 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
2191 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
2193 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, t0, t0, t7, t8, t4, t9, s0, s1, s2, t2, t3
2195 addu_s.qb t7, t7, a1
2196 addu_s.qb t8, t8, a1
2209 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
2211 MIPS_UN8x4_MUL_UN8 t1, t0, t3, t4, t5, t6, t7
2213 addu_s.qb t3, t3, a1
2218 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2223 END(pixman_composite_over_n_8888_asm_mips)
2225 LEAF_MIPS_DSPR2(pixman_composite_add_8_8_8_asm_mips)
2233 SAVE_REGS_ON_STACK 0, v0, v1
2238 srl v0, a3, 2 /* v0 = how many multiples of 4 dst pixels */
2239 beqz v0, 1f /* branch if less than 4 src pixels */
2256 precr_sra.ph.w t1, t0, 0
2257 precr_sra.ph.w t3, t2, 0
2258 precr_sra.ph.w t5, t4, 0
2259 precr_sra.ph.w t7, t6, 0
2261 precr.qb.ph t0, t3, t1
2262 precr.qb.ph t1, t7, t5
2271 precr_sra.ph.w v1, t4, 0
2272 precr_sra.ph.w t8, t7, 0
2274 muleu_s.ph.qbl t2, t0, t8
2275 muleu_s.ph.qbr t3, t0, v1
2284 precr.qb.ph t0, t2, t3
2286 addu_s.qb t2, t0, t1
2316 addu_s.qb t2, t2, t1
2323 RESTORE_REGS_FROM_STACK 0, v0, v1
2327 END(pixman_composite_add_8_8_8_asm_mips)
2329 LEAF_MIPS_DSPR2(pixman_composite_add_n_8_8_asm_mips)
2332 * a1 - src (32bit constant)
2337 SAVE_REGS_ON_STACK 0, v0
2342 srl v0, a3, 2 /* v0 = how many multiples of 4 dst pixels */
2343 beqz v0, 1f /* branch if less than 4 src pixels */
2363 precr_sra.ph.w t1, t0, 0
2364 precr_sra.ph.w t3, t2, 0
2365 precr_sra.ph.w t5, t4, 0
2366 precr_sra.ph.w t7, t6, 0
2368 precr.qb.ph t0, t3, t1
2369 precr.qb.ph t1, t7, t5
2371 muleu_s.ph.qbl t2, t0, t8
2372 muleu_s.ph.qbr t3, t0, t8
2381 precr.qb.ph t0, t2, t3
2383 addu_s.qb t2, t0, t1
2412 addu_s.qb t2, t2, t1
2419 RESTORE_REGS_FROM_STACK 0, v0
2423 END(pixman_composite_add_n_8_8_asm_mips)
2425 LEAF_MIPS_DSPR2(pixman_composite_add_n_8_8888_asm_mips)
2427 * a0 - dst (a8r8g8b8)
2428 * a1 - src (32bit constant)
2433 SAVE_REGS_ON_STACK 0, s0, s1, s2
2441 /* a1 = source (32bit constant) */
2442 lbu t0, 0(a2) /* t0 = mask (a8) */
2443 lbu t1, 1(a2) /* t1 = mask (a8) */
2444 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
2445 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
2448 MIPS_2xUN8x4_MUL_2xUN8_ADD_2xUN8x4 a1, a1, \
2452 t4, t7, t8, t9, s0, s1, s2
2463 /* a1 = source (32bit constant) */
2464 lbu t0, 0(a2) /* t0 = mask (a8) */
2465 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
2467 MIPS_UN8x4_MUL_UN8_ADD_UN8x4 a1, t0, t1, t2, t4, t3, t5, t6
2471 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2475 END(pixman_composite_add_n_8_8888_asm_mips)
2477 LEAF_MIPS_DSPR2(pixman_composite_add_0565_8_0565_asm_mips)
2485 SAVE_REGS_ON_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7
2496 lhu t0, 0(a1) /* t0 = source (r5g6b5) */
2497 lhu t1, 2(a1) /* t1 = source (r5g6b5) */
2498 lbu t2, 0(a2) /* t2 = mask (a8) */
2499 lbu t3, 1(a2) /* t3 = mask (a8) */
2500 lhu t8, 0(a0) /* t8 = destination (r5g6b5) */
2501 lhu t9, 2(a0) /* t9 = destination (r5g6b5) */
2505 CONVERT_2x0565_TO_2x8888 t0, t1, s0, s1, t5, t6, s2, s3, s4, s5
2506 CONVERT_2x0565_TO_2x8888 t8, t9, s2, s3, t5, t6, s4, s5, s6, s7
2507 MIPS_2xUN8x4_MUL_2xUN8_ADD_2xUN8x4 s0, s1, \
2511 t7, s4, s5, s6, s7, t8, t9
2512 CONVERT_2x8888_TO_2x0565 t0, t1, s0, s1, t4, t5, t6, s2, s3
2523 lhu t0, 0(a1) /* t0 = source (r5g6b5) */
2524 lbu t1, 0(a2) /* t1 = mask (a8) */
2525 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
2527 CONVERT_1x0565_TO_1x8888 t0, t3, t4, t5
2528 CONVERT_1x0565_TO_1x8888 t2, t4, t5, t6
2529 MIPS_UN8x4_MUL_UN8_ADD_UN8x4 t3, t1, t4, t0, t7, t2, t5, t6
2530 CONVERT_1x8888_TO_1x0565 t0, t3, t4, t5
2534 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7
2538 END(pixman_composite_add_0565_8_0565_asm_mips)
2540 LEAF_MIPS_DSPR2(pixman_composite_add_8888_8_8888_asm_mips)
2542 * a0 - dst (a8r8g8b8)
2543 * a1 - src (a8r8g8b8)
2548 SAVE_REGS_ON_STACK 0, s0, s1, s2
2556 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2557 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
2558 lbu t2, 0(a2) /* t2 = mask (a8) */
2559 lbu t3, 1(a2) /* t3 = mask (a8) */
2560 lw t5, 0(a0) /* t5 = destination (a8r8g8b8) */
2561 lw t6, 4(a0) /* t6 = destination (a8r8g8b8) */
2565 MIPS_2xUN8x4_MUL_2xUN8_ADD_2xUN8x4 t0, t1, \
2569 t4, t9, s0, s1, s2, t0, t1
2580 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2581 lbu t1, 0(a2) /* t1 = mask (a8) */
2582 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
2584 MIPS_UN8x4_MUL_UN8_ADD_UN8x4 t0, t1, t2, t3, t4, t5, t6, t7
2588 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2592 END(pixman_composite_add_8888_8_8888_asm_mips)
2594 LEAF_MIPS_DSPR2(pixman_composite_add_8888_n_8888_asm_mips)
2596 * a0 - dst (a8r8g8b8)
2597 * a1 - src (a8r8g8b8)
2598 * a2 - mask (32bit constant)
2602 SAVE_REGS_ON_STACK 0, s0, s1, s2
2611 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2612 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
2613 /* a2 = mask (32bit constant) */
2614 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
2615 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
2618 MIPS_2xUN8x4_MUL_2xUN8_ADD_2xUN8x4 t0, t1, \
2622 t4, t7, t8, t9, s0, s1, s2
2633 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2634 /* a2 = mask (32bit constant) */
2635 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
2637 MIPS_UN8x4_MUL_UN8_ADD_UN8x4 t0, a2, t1, t3, t4, t5, t6, t7
2641 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2645 END(pixman_composite_add_8888_n_8888_asm_mips)
2647 LEAF_MIPS_DSPR2(pixman_composite_add_8888_8888_8888_asm_mips)
2649 * a0 - dst (a8r8g8b8)
2650 * a1 - src (a8r8g8b8)
2651 * a2 - mask (a8r8g8b8)
2655 SAVE_REGS_ON_STACK 0, s0, s1, s2
2663 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2664 lw t1, 4(a1) /* t1 = source (a8r8g8b8) */
2665 lw t2, 0(a2) /* t2 = mask (a8r8g8b8) */
2666 lw t3, 4(a2) /* t3 = mask (a8r8g8b8) */
2667 lw t5, 0(a0) /* t5 = destination (a8r8g8b8) */
2668 lw t6, 4(a0) /* t6 = destination (a8r8g8b8) */
2674 MIPS_2xUN8x4_MUL_2xUN8_ADD_2xUN8x4 t0, t1, \
2678 t4, t9, s0, s1, s2, t0, t1
2689 lw t0, 0(a1) /* t0 = source (a8r8g8b8) */
2690 lw t1, 0(a2) /* t1 = mask (a8r8g8b8) */
2691 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
2694 MIPS_UN8x4_MUL_UN8_ADD_UN8x4 t0, t1, t2, t3, t4, t5, t6, t7
2698 RESTORE_REGS_FROM_STACK 0, s0, s1, s2
2702 END(pixman_composite_add_8888_8888_8888_asm_mips)
2704 LEAF_MIPS_DSPR2(pixman_composite_add_8_8_asm_mips)
2713 srl t9, a2, 2 /* t9 = how many multiples of 4 dst pixels */
2714 beqz t9, 1f /* branch if less than 4 src pixels */
2731 precr_sra.ph.w t1, t0, 0
2732 precr_sra.ph.w t3, t2, 0
2733 precr_sra.ph.w t5, t4, 0
2734 precr_sra.ph.w t7, t6, 0
2736 precr.qb.ph t0, t3, t1
2737 precr.qb.ph t1, t7, t5
2739 addu_s.qb t2, t0, t1
2760 addu_s.qb t2, t0, t1
2770 END(pixman_composite_add_8_8_asm_mips)
2772 LEAF_MIPS_DSPR2(pixman_composite_add_8888_8888_asm_mips)
2774 * a0 - dst (a8r8g8b8)
2775 * a1 - src (a8r8g8b8)
2782 srl t9, a2, 2 /* t1 = how many multiples of 4 src pixels */
2783 beqz t9, 3f /* branch if less than 4 src pixels */
2800 addu_s.qb t4, t4, t0
2801 addu_s.qb t5, t5, t1
2802 addu_s.qb t6, t6, t2
2803 addu_s.qb t7, t7, t3
2822 addu_s.qb t4, t4, t0
2823 addu_s.qb t5, t5, t1
2824 addu_s.qb t6, t6, t2
2825 addu_s.qb t7, t7, t3
2839 addu_s.qb t1, t1, t0
2847 END(pixman_composite_add_8888_8888_asm_mips)
2849 LEAF_MIPS_DSPR2(pixman_composite_out_reverse_8_0565_asm_mips)
2859 SAVE_REGS_ON_STACK 0, s0, s1, s2, s3
2869 lbu t0, 0(a1) /* t0 = source (a8) */
2870 lbu t1, 1(a1) /* t1 = source (a8) */
2871 lhu t6, 0(a0) /* t6 = destination (r5g6b5) */
2872 lhu t7, 2(a0) /* t7 = destination (r5g6b5) */
2877 andi t0, 0xff /* t0 = neg source1 */
2878 andi t1, 0xff /* t1 = neg source2 */
2879 CONVERT_2x0565_TO_2x8888 t6, t7, t8, t9, t3, t4, s0, s1, s2, s3
2880 MIPS_2xUN8x4_MUL_2xUN8 t8, t9, t0, t1, t6, t7, t5, s0, s1, s2, s3, t8, t9
2881 CONVERT_2x8888_TO_2x0565 t6, t7, t8, t9, t2, t3, t4, s0, s1
2892 lbu t0, 0(a1) /* t0 = source (a8) */
2893 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
2896 andi t0, 0xff /* t0 = neg source */
2897 CONVERT_1x0565_TO_1x8888 t1, t2, t3, t4
2898 MIPS_UN8x4_MUL_UN8 t2, t0, t1, t5, t3, t4, t6
2899 CONVERT_1x8888_TO_1x0565 t1, t2, t3, t4
2903 RESTORE_REGS_FROM_STACK 0, s0, s1, s2, s3
2908 END(pixman_composite_out_reverse_8_0565_asm_mips)
2910 LEAF_MIPS_DSPR2(pixman_composite_out_reverse_8_8888_asm_mips)
2912 * a0 - dst (a8r8g8b8)
2924 lbu t0, 0(a1) /* t0 = source (a8) */
2925 lbu t1, 1(a1) /* t1 = source (a8) */
2926 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
2927 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
2931 andi t0, 0xff /* t0 = neg source */
2932 andi t1, 0xff /* t1 = neg source */
2934 MIPS_2xUN8x4_MUL_2xUN8 t2, t3, t0, t1, t5, t6, t4, t7, t8, t9, t2, t3, t0
2945 lbu t0, 0(a1) /* t0 = source (a8) */
2946 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
2948 andi t0, 0xff /* t0 = neg source */
2950 MIPS_UN8x4_MUL_UN8 t1, t0, t2, t4, t3, t5, t6
2957 END(pixman_composite_out_reverse_8_8888_asm_mips)
2959 LEAF_MIPS_DSPR2(pixman_composite_over_reverse_n_8888_asm_mips)
2961 * a0 - dst (a8r8g8b8)
2962 * a1 - src (32bit constant)
2969 SAVE_REGS_ON_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7
2971 srl t9, a2, 2 /* t9 = how many multiples of 4 src pixels */
2972 beqz t9, 2f /* branch if less than 4 src pixels */
2997 muleu_s.ph.qbl s0, a1, t5
2998 muleu_s.ph.qbr s1, a1, t5
2999 muleu_s.ph.qbl s2, a1, t6
3000 muleu_s.ph.qbr s3, a1, t6
3001 muleu_s.ph.qbl s4, a1, t7
3002 muleu_s.ph.qbr s5, a1, t7
3003 muleu_s.ph.qbl s6, a1, t8
3004 muleu_s.ph.qbr s7, a1, t8
3039 precr.qb.ph t5, s0, s1
3040 precr.qb.ph t6, s2, s3
3041 precr.qb.ph t7, s4, s5
3042 precr.qb.ph t8, s6, s7
3043 addu_s.qb t5, t1, t5
3044 addu_s.qb t6, t2, t6
3045 addu_s.qb t7, t3, t7
3046 addu_s.qb t8, t4, t8
3065 muleu_s.ph.qbl t4, a1, t2
3066 muleu_s.ph.qbr t5, a1, t2
3079 precr.qb.ph t9, t8, t9
3081 addu_s.qb t9, t1, t9
3088 RESTORE_REGS_FROM_STACK 20, s0, s1, s2, s3, s4, s5, s6, s7
3093 END(pixman_composite_over_reverse_n_8888_asm_mips)
3095 LEAF_MIPS_DSPR2(pixman_composite_in_n_8_asm_mips)
3098 * a1 - src (32bit constant)
3105 srl t7, a2, 2 /* t7 = how many multiples of 4 dst pixels */
3106 beqz t7, 1f /* branch if less than 4 src pixels */
3120 precr_sra.ph.w t1, t0, 0
3121 precr_sra.ph.w t3, t2, 0
3122 precr.qb.ph t0, t3, t1
3124 muleu_s.ph.qbl t2, t0, t8
3125 muleu_s.ph.qbr t3, t0, t8
3134 precr.qb.ph t2, t2, t3
3169 END(pixman_composite_in_n_8_asm_mips)
3171 LEAF_MIPS_DSPR2(pixman_scaled_nearest_scanline_8888_8888_OVER_asm_mips)
3173 * a0 - dst (a8r8g8b8)
3174 * a1 - src (a8r8g8b8)
3180 SAVE_REGS_ON_STACK 0, s0, s1, s2, s3
3181 lw t8, 16(sp) /* t8 = unit_x */
3189 sra t0, a3, 16 /* t0 = vx >> 16 */
3190 sll t0, t0, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3192 lw t0, 0(t0) /* t0 = source (a8r8g8b8) */
3193 addu a3, a3, t8 /* a3 = vx + unit_x */
3195 sra t1, a3, 16 /* t0 = vx >> 16 */
3196 sll t1, t1, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3198 lw t1, 0(t1) /* t1 = source (a8r8g8b8) */
3199 addu a3, a3, t8 /* a3 = vx + unit_x */
3201 lw t2, 0(a0) /* t2 = destination (a8r8g8b8) */
3202 lw t3, 4(a0) /* t3 = destination (a8r8g8b8) */
3204 OVER_2x8888_2x8888 t0, t1, t2, t3, t4, t5, t6, t7, t9, s0, s1, s2, s3
3215 sra t0, a3, 16 /* t0 = vx >> 16 */
3216 sll t0, t0, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3218 lw t0, 0(t0) /* t0 = source (a8r8g8b8) */
3219 lw t1, 0(a0) /* t1 = destination (a8r8g8b8) */
3220 addu a3, a3, t8 /* a3 = vx + unit_x */
3222 OVER_8888_8888 t0, t1, t2, t6, t4, t5, t3, t7
3226 RESTORE_REGS_FROM_STACK 0, s0, s1, s2, s3
3230 END(pixman_scaled_nearest_scanline_8888_8888_OVER_asm_mips)
3232 LEAF_MIPS_DSPR2(pixman_scaled_nearest_scanline_8888_0565_OVER_asm_mips)
3235 * a1 - src (a8r8g8b8)
3241 SAVE_REGS_ON_STACK 24, s0, s1, s2, s3, s4, v0, v1
3242 lw t8, 40(sp) /* t8 = unit_x */
3253 sra t0, a3, 16 /* t0 = vx >> 16 */
3254 sll t0, t0, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3256 lw t0, 0(t0) /* t0 = source (a8r8g8b8) */
3257 addu a3, a3, t8 /* a3 = vx + unit_x */
3258 sra t1, a3, 16 /* t0 = vx >> 16 */
3259 sll t1, t1, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3261 lw t1, 0(t1) /* t1 = source (a8r8g8b8) */
3262 addu a3, a3, t8 /* a3 = vx + unit_x */
3263 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
3264 lhu t3, 2(a0) /* t3 = destination (r5g6b5) */
3266 CONVERT_2x0565_TO_2x8888 t2, t3, v0, v1, t6, t7, s0, s1, s2, s3
3267 OVER_2x8888_2x8888 t0, t1, v0, v1, t2, t3, t4, t9, s0, s1, s2, s3, s4
3268 CONVERT_2x8888_TO_2x0565 t2, t3, v0, v1, t5, t6, t7, t9, s2
3279 sra t0, a3, 16 /* t0 = vx >> 16 */
3280 sll t0, t0, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3282 lw t0, 0(t0) /* t0 = source (a8r8g8b8) */
3283 lhu t1, 0(a0) /* t1 = destination (r5g6b5) */
3284 addu a3, a3, t8 /* a3 = vx + unit_x */
3286 CONVERT_1x0565_TO_1x8888 t1, t2, t5, t6
3287 OVER_8888_8888 t0, t2, t1, t4, t3, t5, t6, t7
3288 CONVERT_1x8888_TO_1x0565 t1, t2, t5, t6
3292 RESTORE_REGS_FROM_STACK 24, s0, s1, s2, s3, s4, v0, v1
3296 END(pixman_scaled_nearest_scanline_8888_0565_OVER_asm_mips)
3298 LEAF_MIPS_DSPR2(pixman_scaled_nearest_scanline_0565_8888_SRC_asm_mips)
3300 * a0 - dst (a8r8g8b8)
3307 SAVE_REGS_ON_STACK 0, v0
3311 lw v0, 16(sp) /* v0 = unit_x */
3319 sra t0, a3, 16 /* t0 = vx >> 16 */
3320 sll t0, t0, 1 /* t0 = t0 * 2 ((r5g6b5)) */
3322 lhu t0, 0(t0) /* t0 = source ((r5g6b5)) */
3323 addu a3, a3, v0 /* a3 = vx + unit_x */
3324 sra t1, a3, 16 /* t1 = vx >> 16 */
3325 sll t1, t1, 1 /* t1 = t1 * 2 ((r5g6b5)) */
3327 lhu t1, 0(t1) /* t1 = source ((r5g6b5)) */
3328 addu a3, a3, v0 /* a3 = vx + unit_x */
3331 CONVERT_2x0565_TO_2x8888 t0, t1, t2, t3, t4, t5, t6, t7, t8, t9
3342 sra t0, a3, 16 /* t0 = vx >> 16 */
3343 sll t0, t0, 1 /* t0 = t0 * 2 ((r5g6b5)) */
3345 lhu t0, 0(t0) /* t0 = source ((r5g6b5)) */
3347 CONVERT_1x0565_TO_1x8888 t0, t1, t2, t3
3351 RESTORE_REGS_FROM_STACK 0, v0
3355 END(pixman_scaled_nearest_scanline_0565_8888_SRC_asm_mips)
3357 LEAF_MIPS_DSPR2(pixman_scaled_nearest_scanline_8888_8_0565_OVER_asm_mips)
3360 * a1 - src (a8r8g8b8)
3369 SAVE_REGS_ON_STACK 20, v0, v1, s0, s1, s2, s3, s4, s5
3370 lw v0, 36(sp) /* v0 = vx */
3371 lw v1, 40(sp) /* v1 = unit_x */
3381 sra t0, v0, 16 /* t0 = vx >> 16 */
3382 sll t0, t0, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3384 lw t0, 0(t0) /* t0 = source (a8r8g8b8) */
3385 addu v0, v0, v1 /* v0 = vx + unit_x */
3386 sra t1, v0, 16 /* t1 = vx >> 16 */
3387 sll t1, t1, 2 /* t1 = t1 * 4 (a8r8g8b8) */
3389 lw t1, 0(t1) /* t1 = source (a8r8g8b8) */
3390 addu v0, v0, v1 /* v0 = vx + unit_x */
3391 lbu t2, 0(a2) /* t2 = mask (a8) */
3392 lbu t3, 1(a2) /* t3 = mask (a8) */
3393 lhu t4, 0(a0) /* t4 = destination (r5g6b5) */
3394 lhu t5, 2(a0) /* t5 = destination (r5g6b5) */
3397 CONVERT_2x0565_TO_2x8888 t4, t5, s0, s1, t8, t9, s2, s3, s4, s5
3398 OVER_2x8888_2x8_2x8888 t0, t1, \
3402 t6, s2, s3, s4, s5, t2, t3
3403 CONVERT_2x8888_TO_2x0565 t4, t5, s0, s1, t7, t8, t9, s2, s3
3414 sra t0, v0, 16 /* t0 = vx >> 16 */
3415 sll t0, t0, 2 /* t0 = t0 * 4 (a8r8g8b8) */
3417 lw t0, 0(t0) /* t0 = source (a8r8g8b8) */
3418 lbu t1, 0(a2) /* t1 = mask (a8) */
3419 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
3421 CONVERT_1x0565_TO_1x8888 t2, t3, t4, t5
3422 OVER_8888_8_8888 t0, t1, t3, t2, t6, t4, t5, t7, t8
3423 CONVERT_1x8888_TO_1x0565 t2, t3, t4, t5
3427 RESTORE_REGS_FROM_STACK 20, v0, v1, s0, s1, s2, s3, s4, s5
3432 END(pixman_scaled_nearest_scanline_8888_8_0565_OVER_asm_mips)
3434 LEAF_MIPS_DSPR2(pixman_scaled_nearest_scanline_0565_8_0565_OVER_asm_mips)
3446 SAVE_REGS_ON_STACK 20, v0, v1, s0, s1, s2, s3, s4, s5
3447 lw v0, 36(sp) /* v0 = vx */
3448 lw v1, 40(sp) /* v1 = unit_x */
3458 sra t0, v0, 16 /* t0 = vx >> 16 */
3459 sll t0, t0, 1 /* t0 = t0 * 2 (r5g6b5) */
3461 lhu t0, 0(t0) /* t0 = source (r5g6b5) */
3462 addu v0, v0, v1 /* v0 = vx + unit_x */
3463 sra t1, v0, 16 /* t1 = vx >> 16 */
3464 sll t1, t1, 1 /* t1 = t1 * 2 (r5g6b5) */
3466 lhu t1, 0(t1) /* t1 = source (r5g6b5) */
3467 addu v0, v0, v1 /* v0 = vx + unit_x */
3468 lbu t2, 0(a2) /* t2 = mask (a8) */
3469 lbu t3, 1(a2) /* t3 = mask (a8) */
3470 lhu t8, 0(a0) /* t8 = destination (r5g6b5) */
3471 lhu t9, 2(a0) /* t9 = destination (r5g6b5) */
3474 CONVERT_2x0565_TO_2x8888 t0, t1, s0, s1, t5, t6, s2, s3, s4, s5
3475 CONVERT_2x0565_TO_2x8888 t8, t9, s2, s3, t5, t6, s4, s5, t0, t1
3476 OVER_2x8888_2x8_2x8888 s0, s1, \
3480 t7, t8, t9, s4, s5, s0, s1
3481 CONVERT_2x8888_TO_2x0565 t0, t1, s0, s1, t4, t5, t6, s2, s3
3492 sra t0, v0, 16 /* t0 = vx >> 16 */
3493 sll t0, t0, 1 /* t0 = t0 * 2 (r5g6b5) */
3496 lhu t0, 0(t0) /* t0 = source (r5g6b5) */
3497 lbu t1, 0(a2) /* t1 = mask (a8) */
3498 lhu t2, 0(a0) /* t2 = destination (r5g6b5) */
3500 CONVERT_1x0565_TO_1x8888 t0, t3, t4, t5
3501 CONVERT_1x0565_TO_1x8888 t2, t4, t5, t6
3502 OVER_8888_8_8888 t3, t1, t4, t0, t7, t2, t5, t6, t8
3503 CONVERT_1x8888_TO_1x0565 t0, t3, t4, t5
3507 RESTORE_REGS_FROM_STACK 20, v0, v1, s0, s1, s2, s3, s4, s5
3512 END(pixman_scaled_nearest_scanline_0565_8_0565_OVER_asm_mips)
3514 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8888_SRC_asm_mips)
3529 SAVE_REGS_ON_STACK 20, v0, s0, s1, s2, s3, s4, s5, s6, s7
3531 lw s0, 36(sp) /* s0 = wt */
3532 lw s1, 40(sp) /* s1 = wb */
3533 lw s2, 44(sp) /* s2 = vx */
3534 lw s3, 48(sp) /* s3 = unit_x */
3535 li v0, BILINEAR_INTERPOLATION_RANGE
3537 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3538 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3540 andi t4, s2, 0xffff /* t4 = (short)vx */
3541 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3542 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3544 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3545 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3546 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3547 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3552 lwx t0, t9(a1) /* t0 = tl */
3553 lwx t1, t8(a1) /* t1 = tr */
3555 lwx t2, t9(a2) /* t2 = bl */
3556 lwx t3, t8(a2) /* t3 = br */
3558 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3560 addu s2, s2, s3 /* vx += unit_x; */
3565 RESTORE_REGS_FROM_STACK 20, v0, s0, s1, s2, s3, s4, s5, s6, s7
3570 END(pixman_scaled_bilinear_scanline_8888_8888_SRC_asm_mips)
3572 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_0565_SRC_asm_mips)
3587 SAVE_REGS_ON_STACK 20, v0, s0, s1, s2, s3, s4, s5, s6, s7
3589 lw s0, 36(sp) /* s0 = wt */
3590 lw s1, 40(sp) /* s1 = wb */
3591 lw s2, 44(sp) /* s2 = vx */
3592 lw s3, 48(sp) /* s3 = unit_x */
3593 li v0, BILINEAR_INTERPOLATION_RANGE
3595 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3596 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3598 andi t4, s2, 0xffff /* t4 = (short)vx */
3599 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3600 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3602 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3603 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3604 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3605 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3610 lwx t0, t9(a1) /* t0 = tl */
3611 lwx t1, t8(a1) /* t1 = tr */
3613 lwx t2, t9(a2) /* t2 = bl */
3614 lwx t3, t8(a2) /* t3 = br */
3616 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3617 CONVERT_1x8888_TO_1x0565 t0, t1, t2, t3
3619 addu s2, s2, s3 /* vx += unit_x; */
3624 RESTORE_REGS_FROM_STACK 20, v0, s0, s1, s2, s3, s4, s5, s6, s7
3629 END(pixman_scaled_bilinear_scanline_8888_0565_SRC_asm_mips)
3631 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_0565_8888_SRC_asm_mips)
3646 SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3648 lw s0, 44(sp) /* s0 = wt */
3649 lw s1, 48(sp) /* s1 = wb */
3650 lw s2, 52(sp) /* s2 = vx */
3651 lw s3, 56(sp) /* s3 = unit_x */
3652 li v0, BILINEAR_INTERPOLATION_RANGE
3656 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3657 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3659 andi t4, s2, 0xffff /* t4 = (short)vx */
3660 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3661 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3663 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3664 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3665 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3666 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3671 lhx t0, t9(a1) /* t0 = tl */
3672 lhx t1, t8(a1) /* t1 = tr */
3675 lhx t2, t9(a2) /* t2 = bl */
3676 lhx t3, t8(a2) /* t3 = br */
3679 CONVERT_2x0565_TO_2x8888 t0, t1, t0, t1, v1, s8, t4, t5, t6, t7
3680 CONVERT_2x0565_TO_2x8888 t2, t3, t2, t3, v1, s8, t4, t5, t6, t7
3681 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3683 addu s2, s2, s3 /* vx += unit_x; */
3688 RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3693 END(pixman_scaled_bilinear_scanline_0565_8888_SRC_asm_mips)
3695 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_0565_0565_SRC_asm_mips)
3710 SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3712 lw s0, 44(sp) /* s0 = wt */
3713 lw s1, 48(sp) /* s1 = wb */
3714 lw s2, 52(sp) /* s2 = vx */
3715 lw s3, 56(sp) /* s3 = unit_x */
3716 li v0, BILINEAR_INTERPOLATION_RANGE
3720 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3721 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3723 andi t4, s2, 0xffff /* t4 = (short)vx */
3724 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3725 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3727 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3728 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3729 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3730 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3735 lhx t0, t9(a1) /* t0 = tl */
3736 lhx t1, t8(a1) /* t1 = tr */
3739 lhx t2, t9(a2) /* t2 = bl */
3740 lhx t3, t8(a2) /* t3 = br */
3743 CONVERT_2x0565_TO_2x8888 t0, t1, t0, t1, v1, s8, t4, t5, t6, t7
3744 CONVERT_2x0565_TO_2x8888 t2, t3, t2, t3, v1, s8, t4, t5, t6, t7
3745 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3746 CONVERT_1x8888_TO_1x0565 t0, t1, t2, t3
3748 addu s2, s2, s3 /* vx += unit_x; */
3753 RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3758 END(pixman_scaled_bilinear_scanline_0565_0565_SRC_asm_mips)
3760 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8888_OVER_asm_mips)
3775 SAVE_REGS_ON_STACK 24, v0, s0, s1, s2, s3, s4, s5, s6, s7, s8
3777 lw s0, 40(sp) /* s0 = wt */
3778 lw s1, 44(sp) /* s1 = wb */
3779 lw s2, 48(sp) /* s2 = vx */
3780 lw s3, 52(sp) /* s3 = unit_x */
3781 li v0, BILINEAR_INTERPOLATION_RANGE
3784 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3785 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3787 andi t4, s2, 0xffff /* t4 = (short)vx */
3788 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3789 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3791 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3792 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3793 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3794 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3799 lwx t0, t9(a1) /* t0 = tl */
3800 lwx t1, t8(a1) /* t1 = tr */
3802 lwx t2, t9(a2) /* t2 = bl */
3803 lwx t3, t8(a2) /* t3 = br */
3805 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3806 lw t1, 0(a0) /* t1 = dest */
3807 OVER_8888_8888 t0, t1, t2, s8, t3, t4, t5, t6
3809 addu s2, s2, s3 /* vx += unit_x; */
3814 RESTORE_REGS_FROM_STACK 24, v0, s0, s1, s2, s3, s4, s5, s6, s7, s8
3819 END(pixman_scaled_bilinear_scanline_8888_8888_OVER_asm_mips)
3821 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8888_ADD_asm_mips)
3836 SAVE_REGS_ON_STACK 20, v0, s0, s1, s2, s3, s4, s5, s6, s7
3838 lw s0, 36(sp) /* s0 = wt */
3839 lw s1, 40(sp) /* s1 = wb */
3840 lw s2, 44(sp) /* s2 = vx */
3841 lw s3, 48(sp) /* s3 = unit_x */
3842 li v0, BILINEAR_INTERPOLATION_RANGE
3844 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3845 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3847 andi t4, s2, 0xffff /* t4 = (short)vx */
3848 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3849 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3851 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3852 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3853 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3854 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3859 lwx t0, t9(a1) /* t0 = tl */
3860 lwx t1, t8(a1) /* t1 = tr */
3862 lwx t2, t9(a2) /* t2 = bl */
3863 lwx t3, t8(a2) /* t3 = br */
3865 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3867 addu_s.qb t2, t0, t1
3869 addu s2, s2, s3 /* vx += unit_x; */
3874 RESTORE_REGS_FROM_STACK 20, v0, s0, s1, s2, s3, s4, s5, s6, s7
3879 END(pixman_scaled_bilinear_scanline_8888_8888_ADD_asm_mips)
3881 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8_8888_SRC_asm_mips)
3898 SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3900 lw s0, 44(sp) /* s0 = wt */
3901 lw s1, 48(sp) /* s1 = wb */
3902 lw s2, 52(sp) /* s2 = vx */
3903 lw s3, 56(sp) /* s3 = unit_x */
3904 li v0, BILINEAR_INTERPOLATION_RANGE
3907 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3908 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3910 andi t4, s2, 0xffff /* t4 = (short)vx */
3911 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3912 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3914 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3915 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3916 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3917 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3922 lwx t0, t9(a2) /* t0 = tl */
3923 lwx t1, t8(a2) /* t1 = tr */
3925 lwx t2, t9(a3) /* t2 = bl */
3926 lwx t3, t8(a3) /* t3 = br */
3928 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3929 lbu t1, 0(a1) /* t1 = mask */
3931 MIPS_UN8x4_MUL_UN8 t0, t1, t0, s8, t2, t3, t4
3933 addu s2, s2, s3 /* vx += unit_x; */
3938 RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3943 END(pixman_scaled_bilinear_scanline_8888_8_8888_SRC_asm_mips)
3945 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8_0565_SRC_asm_mips)
3962 SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
3964 lw s0, 44(sp) /* s0 = wt */
3965 lw s1, 48(sp) /* s1 = wb */
3966 lw s2, 52(sp) /* s2 = vx */
3967 lw s3, 56(sp) /* s3 = unit_x */
3968 li v0, BILINEAR_INTERPOLATION_RANGE
3971 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3972 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
3974 andi t4, s2, 0xffff /* t4 = (short)vx */
3975 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
3976 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
3978 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
3979 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
3980 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
3981 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
3986 lwx t0, t9(a2) /* t0 = tl */
3987 lwx t1, t8(a2) /* t1 = tr */
3989 lwx t2, t9(a3) /* t2 = bl */
3990 lwx t3, t8(a3) /* t3 = br */
3992 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
3993 lbu t1, 0(a1) /* t1 = mask */
3995 MIPS_UN8x4_MUL_UN8 t0, t1, t0, s8, t2, t3, t4
3996 CONVERT_1x8888_TO_1x0565 t0, t1, t2, t3
3998 addu s2, s2, s3 /* vx += unit_x; */
4003 RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
4008 END(pixman_scaled_bilinear_scanline_8888_8_0565_SRC_asm_mips)
4010 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_0565_8_x888_SRC_asm_mips)
4027 SAVE_REGS_ON_STACK 32, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8, ra
4029 lw s0, 48(sp) /* s0 = wt */
4030 lw s1, 52(sp) /* s1 = wb */
4031 lw s2, 56(sp) /* s2 = vx */
4032 lw s3, 60(sp) /* s3 = unit_x */
4033 lw ra, 64(sp) /* ra = w */
4038 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4039 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4041 andi t4, s2, 0xffff /* t4 = (short)vx */
4042 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
4043 li t5, BILINEAR_INTERPOLATION_RANGE
4044 subu t5, t5, t4 /* t5 = ( 256 - (vx>>8)) */
4046 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
4047 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
4048 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
4049 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
4054 lhx t0, t9(a2) /* t0 = tl */
4055 lhx t1, t8(a2) /* t1 = tr */
4058 lhx t2, t9(a3) /* t2 = bl */
4059 lhx t3, t8(a3) /* t3 = br */
4062 CONVERT_2x0565_TO_2x8888 t0, t1, t0, t1, v1, s8, t4, t5, t6, t7
4063 CONVERT_2x0565_TO_2x8888 t2, t3, t2, t3, v1, s8, t4, t5, t6, t7
4064 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
4065 lbu t1, 0(a1) /* t1 = mask */
4067 MIPS_UN8x4_MUL_UN8 t0, t1, t0, v0, t2, t3, t4
4069 addu s2, s2, s3 /* vx += unit_x; */
4074 RESTORE_REGS_FROM_STACK 32, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8, ra
4079 END(pixman_scaled_bilinear_scanline_0565_8_x888_SRC_asm_mips)
4081 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_0565_8_0565_SRC_asm_mips)
4098 SAVE_REGS_ON_STACK 32, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8, ra
4100 lw s0, 48(sp) /* s0 = wt */
4101 lw s1, 52(sp) /* s1 = wb */
4102 lw s2, 56(sp) /* s2 = vx */
4103 lw s3, 60(sp) /* s3 = unit_x */
4104 lw ra, 64(sp) /* ra = w */
4109 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4110 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4112 andi t4, s2, 0xffff /* t4 = (short)vx */
4113 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
4114 li t5, BILINEAR_INTERPOLATION_RANGE
4115 subu t5, t5, t4 /* t5 = ( 256 - (vx>>8)) */
4117 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
4118 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
4119 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
4120 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
4125 lhx t0, t9(a2) /* t0 = tl */
4126 lhx t1, t8(a2) /* t1 = tr */
4129 lhx t2, t9(a3) /* t2 = bl */
4130 lhx t3, t8(a3) /* t3 = br */
4133 CONVERT_2x0565_TO_2x8888 t0, t1, t0, t1, v1, s8, t4, t5, t6, t7
4134 CONVERT_2x0565_TO_2x8888 t2, t3, t2, t3, v1, s8, t4, t5, t6, t7
4135 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
4136 lbu t1, 0(a1) /* t1 = mask */
4138 MIPS_UN8x4_MUL_UN8 t0, t1, t0, v0, t2, t3, t4
4139 CONVERT_1x8888_TO_1x0565 t0, t1, t2, t3
4141 addu s2, s2, s3 /* vx += unit_x; */
4146 RESTORE_REGS_FROM_STACK 32, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8, ra
4151 END(pixman_scaled_bilinear_scanline_0565_8_0565_SRC_asm_mips)
4153 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8_8888_OVER_asm_mips)
4155 * a0 - dst (a8r8g8b8)
4157 * a2 - src_top (a8r8g8b8)
4158 * a3 - src_bottom (a8r8g8b8)
4166 SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
4168 lw v1, 60(sp) /* v1 = w(sp + 32 + 28 save regs stack offset)*/
4172 lw s0, 44(sp) /* s0 = wt */
4173 lw s1, 48(sp) /* s1 = wb */
4174 lw s2, 52(sp) /* s2 = vx */
4175 lw s3, 56(sp) /* s3 = unit_x */
4176 li v0, BILINEAR_INTERPOLATION_RANGE
4179 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4180 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4183 andi t4, s2, 0xffff /* t4 = (short)vx */
4184 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
4185 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
4187 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
4188 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
4189 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
4190 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
4195 lwx t0, t9(a2) /* t0 = tl */
4196 lwx t1, t8(a2) /* t1 = tr */
4198 lwx t2, t9(a3) /* t2 = bl */
4199 lwx t3, t8(a3) /* t3 = br */
4201 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, \
4202 t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
4203 lbu t1, 0(a1) /* t1 = mask */
4204 lw t2, 0(a0) /* t2 = dst */
4206 OVER_8888_8_8888 t0, t1, t2, t0, s8, t3, t4, t5, t6
4208 addu s2, s2, s3 /* vx += unit_x; */
4214 RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
4218 END(pixman_scaled_bilinear_scanline_8888_8_8888_OVER_asm_mips)
4220 LEAF_MIPS_DSPR2(pixman_scaled_bilinear_scanline_8888_8_8888_ADD_asm_mips)
4237 SAVE_REGS_ON_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
4239 lw s0, 44(sp) /* s0 = wt */
4240 lw s1, 48(sp) /* s1 = wb */
4241 lw s2, 52(sp) /* s2 = vx */
4242 lw s3, 56(sp) /* s3 = unit_x */
4243 li v0, BILINEAR_INTERPOLATION_RANGE
4246 sll s0, s0, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4247 sll s1, s1, (2 * (8 - BILINEAR_INTERPOLATION_BITS))
4249 andi t4, s2, 0xffff /* t4 = (short)vx */
4250 srl t4, t4, (16 - BILINEAR_INTERPOLATION_BITS) /* t4 = vx >> 8 */
4251 subu t5, v0, t4 /* t5 = ( 256 - (vx>>8)) */
4253 mul s4, s0, t5 /* s4 = wt*(256-(vx>>8)) */
4254 mul s5, s0, t4 /* s5 = wt*(vx>>8) */
4255 mul s6, s1, t5 /* s6 = wb*(256-(vx>>8)) */
4256 mul s7, s1, t4 /* s7 = wb*(vx>>8) */
4261 lwx t0, t9(a2) /* t0 = tl */
4262 lwx t1, t8(a2) /* t1 = tr */
4264 lwx t2, t9(a3) /* t2 = bl */
4265 lwx t3, t8(a3) /* t3 = br */
4267 BILINEAR_INTERPOLATE_SINGLE_PIXEL t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, s4, s5, s6, s7
4268 lbu t1, 0(a1) /* t1 = mask */
4269 lw t2, 0(a0) /* t2 = dst */
4271 MIPS_UN8x4_MUL_UN8_ADD_UN8x4 t0, t1, t2, t0, s8, t3, t4, t5
4273 addu s2, s2, s3 /* vx += unit_x; */
4278 RESTORE_REGS_FROM_STACK 28, v0, v1, s0, s1, s2, s3, s4, s5, s6, s7, s8
4283 END(pixman_scaled_bilinear_scanline_8888_8_8888_ADD_asm_mips)