bsnes-patches/v085/0020-Fixes-to-SA1-open-bus-emulation.patch

   1 From cf662a12578778cb50c25d5275ce58deabd7eabe Mon Sep 17 00:00:00 2001
   2 From: Ilari Liusvaara <ilari.liusvaara@elisanet.fi>
   3 Date: Wed, 30 Apr 2014 00:18:58 +0300
   4 Subject: [PATCH 20/27] Fixes to SA1 open bus emulation
   5
   6 ---
   7  snes/chip/sa1/memory/memory.cpp | 19 +++++++++++--------
   8  1 file changed, 11 insertions(+), 8 deletions(-)
   9
  10 diff --git a/snes/chip/sa1/memory/memory.cpp b/snes/chip/sa1/memory/memory.cpp
  11 index 9bb4ff20..614dfb0c 100755
  12 --- a/snes/chip/sa1/memory/memory.cpp
  13 +++ b/snes/chip/sa1/memory/memory.cpp
  14 @@ -36,6 +36,7 @@ uint8 SA1::bus_read(unsigned addr) {
  15      synchronize_cpu();
  16      return bitmap_read(addr & 0x0fffff);
  17    }
  18 +  return regs.mdr;
  19  }
  20
  21  void SA1::bus_write(unsigned addr, uint8 data) {
  22 @@ -73,29 +74,31 @@ void SA1::bus_write(unsigned addr, uint8 data) {
  23  //to avoid syncing the S-CPU and SA-1*; as both chips are able to access
  24  //these ports.
  25  uint8 SA1::vbr_read(unsigned addr) {
  26 +  //Let's share the bus state with main SA1 bus (is this correct?)
  27    if((addr & 0x408000) == 0x008000) {  //$00-3f|80-bf:8000-ffff
  28 -    return mmc_read(addr);
  29 +    return regs.mdr = mmc_read(addr);
  30    }
  31
  32    if((addr & 0xc00000) == 0xc00000) {  //$c0-ff:0000-ffff
  33 -    return mmc_read(addr);
  34 +    return regs.mdr = mmc_read(addr);
  35    }
  36
  37    if((addr & 0x40e000) == 0x006000) {  //$00-3f|80-bf:6000-7fff
  38 -    return cartridge.ram.read(addr & (cartridge.ram.size() - 1));
  39 +    return regs.mdr = cartridge.ram.read(addr & (cartridge.ram.size() - 1));
  40    }
  41
  42    if((addr & 0xf00000) == 0x400000) {  //$40-4f:0000-ffff
  43 -    return cartridge.ram.read(addr & (cartridge.ram.size() - 1));
  44 +    return regs.mdr = cartridge.ram.read(addr & (cartridge.ram.size() - 1));
  45    }
  46
  47    if((addr & 0x40f800) == 0x000000) {  //$00-3f|80-bf:0000-07ff
  48 -    return iram.read(addr & 2047);
  49 +    return regs.mdr = iram.read(addr & 2047);
  50    }
  51
  52    if((addr & 0x40f800) == 0x003000) {  //$00-3f|80-bf:3000-37ff
  53 -    return iram.read(addr & 0x2047);
  54 +    return regs.mdr = iram.read(addr & 0x2047);
  55    }
  56 +  return regs.mdr;
  57  }
  58
  59  //ROM, I-RAM and MMIO registers are accessed at ~10.74MHz (2 clock ticks)
  60 @@ -110,13 +113,13 @@ void SA1::op_io() {
  61  uint8 SA1::op_read(unsigned addr, bool exec) {
  62    tick();
  63    if(((addr & 0x40e000) == 0x006000) || ((addr & 0xd00000) == 0x400000)) tick();
  64 -  return bus_read(addr);
  65 +  return regs.mdr = bus_read(addr);
  66  }
  67
  68  void SA1::op_write(unsigned addr, uint8 data) {
  69    tick();
  70    if(((addr & 0x40e000) == 0x006000) || ((addr & 0xd00000) == 0x400000)) tick();
  71 -  bus_write(addr, data);
  72 +  bus_write(addr, regs.mdr = data);
  73  }
  74
  75  uint8 SA1::mmc_read(unsigned addr) {
  76 --
  77 2.15.0.rc1
  78