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[llvm.git] / lib / CodeGen / OptimizeExts.cpp
blob41fc204074410c144140afac9df3edd72a4ebe3b
1 //===-- OptimizeExts.cpp - Optimize sign / zero extension instrs -----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass performs optimization of sign / zero extension instructions. It
11 // may be extended to handle other instructions of similar property.
13 // On some targets, some instructions, e.g. X86 sign / zero extension, may
14 // leave the source value in the lower part of the result. This pass will
15 // replace (some) uses of the pre-extension value with uses of the sub-register
16 // of the results.
18 //===----------------------------------------------------------------------===//
20 #define DEBUG_TYPE "ext-opt"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/MachineDominators.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Target/TargetInstrInfo.h"
26 #include "llvm/Target/TargetRegisterInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/ADT/SmallPtrSet.h"
29 #include "llvm/ADT/Statistic.h"
30 using namespace llvm;
32 static cl::opt<bool> Aggressive("aggressive-ext-opt", cl::Hidden,
33 cl::desc("Aggressive extension optimization"));
35 STATISTIC(NumReuse, "Number of extension results reused");
37 namespace {
38 class OptimizeExts : public MachineFunctionPass {
39 const TargetMachine *TM;
40 const TargetInstrInfo *TII;
41 MachineRegisterInfo *MRI;
42 MachineDominatorTree *DT; // Machine dominator tree
44 public:
45 static char ID; // Pass identification
46 OptimizeExts() : MachineFunctionPass(&ID) {}
48 virtual bool runOnMachineFunction(MachineFunction &MF);
50 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
51 AU.setPreservesCFG();
52 MachineFunctionPass::getAnalysisUsage(AU);
53 if (Aggressive) {
54 AU.addRequired<MachineDominatorTree>();
55 AU.addPreserved<MachineDominatorTree>();
59 private:
60 bool OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
61 SmallPtrSet<MachineInstr*, 8> &LocalMIs);
65 char OptimizeExts::ID = 0;
66 static RegisterPass<OptimizeExts>
67 X("opt-exts", "Optimize sign / zero extensions");
69 FunctionPass *llvm::createOptimizeExtsPass() { return new OptimizeExts(); }
71 /// OptimizeInstr - If instruction is a copy-like instruction, i.e. it reads
72 /// a single register and writes a single register and it does not modify
73 /// the source, and if the source value is preserved as a sub-register of
74 /// the result, then replace all reachable uses of the source with the subreg
75 /// of the result.
76 /// Do not generate an EXTRACT that is used only in a debug use, as this
77 /// changes the code. Since this code does not currently share EXTRACTs, just
78 /// ignore all debug uses.
79 bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB,
80 SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
81 bool Changed = false;
82 LocalMIs.insert(MI);
84 unsigned SrcReg, DstReg, SubIdx;
85 if (TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx)) {
86 if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
87 TargetRegisterInfo::isPhysicalRegister(SrcReg))
88 return false;
90 MachineRegisterInfo::use_nodbg_iterator UI = MRI->use_nodbg_begin(SrcReg);
91 if (++UI == MRI->use_nodbg_end())
92 // No other uses.
93 return false;
95 // Ok, the source has other uses. See if we can replace the other uses
96 // with use of the result of the extension.
97 SmallPtrSet<MachineBasicBlock*, 4> ReachedBBs;
98 UI = MRI->use_nodbg_begin(DstReg);
99 for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
100 UI != UE; ++UI)
101 ReachedBBs.insert(UI->getParent());
103 bool ExtendLife = true;
104 // Uses that are in the same BB of uses of the result of the instruction.
105 SmallVector<MachineOperand*, 8> Uses;
106 // Uses that the result of the instruction can reach.
107 SmallVector<MachineOperand*, 8> ExtendedUses;
109 UI = MRI->use_nodbg_begin(SrcReg);
110 for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
111 UI != UE; ++UI) {
112 MachineOperand &UseMO = UI.getOperand();
113 MachineInstr *UseMI = &*UI;
114 if (UseMI == MI)
115 continue;
116 if (UseMI->isPHI()) {
117 ExtendLife = false;
118 continue;
121 MachineBasicBlock *UseMBB = UseMI->getParent();
122 if (UseMBB == MBB) {
123 // Local uses that come after the extension.
124 if (!LocalMIs.count(UseMI))
125 Uses.push_back(&UseMO);
126 } else if (ReachedBBs.count(UseMBB))
127 // Non-local uses where the result of extension is used. Always
128 // replace these unless it's a PHI.
129 Uses.push_back(&UseMO);
130 else if (Aggressive && DT->dominates(MBB, UseMBB))
131 // We may want to extend live range of the extension result in order
132 // to replace these uses.
133 ExtendedUses.push_back(&UseMO);
134 else {
135 // Both will be live out of the def MBB anyway. Don't extend live
136 // range of the extension result.
137 ExtendLife = false;
138 break;
142 if (ExtendLife && !ExtendedUses.empty())
143 // Ok, we'll extend the liveness of the extension result.
144 std::copy(ExtendedUses.begin(), ExtendedUses.end(),
145 std::back_inserter(Uses));
147 // Now replace all uses.
148 if (!Uses.empty()) {
149 SmallPtrSet<MachineBasicBlock*, 4> PHIBBs;
150 // Look for PHI uses of the extended result, we don't want to extend the
151 // liveness of a PHI input. It breaks all kinds of assumptions down
152 // stream. A PHI use is expected to be the kill of its source values.
153 UI = MRI->use_nodbg_begin(DstReg);
154 for (MachineRegisterInfo::use_nodbg_iterator UE = MRI->use_nodbg_end();
155 UI != UE; ++UI)
156 if (UI->isPHI())
157 PHIBBs.insert(UI->getParent());
159 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
160 for (unsigned i = 0, e = Uses.size(); i != e; ++i) {
161 MachineOperand *UseMO = Uses[i];
162 MachineInstr *UseMI = UseMO->getParent();
163 MachineBasicBlock *UseMBB = UseMI->getParent();
164 if (PHIBBs.count(UseMBB))
165 continue;
166 unsigned NewVR = MRI->createVirtualRegister(RC);
167 BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
168 TII->get(TargetOpcode::EXTRACT_SUBREG), NewVR)
169 .addReg(DstReg).addImm(SubIdx);
170 UseMO->setReg(NewVR);
171 ++NumReuse;
172 Changed = true;
177 return Changed;
180 bool OptimizeExts::runOnMachineFunction(MachineFunction &MF) {
181 TM = &MF.getTarget();
182 TII = TM->getInstrInfo();
183 MRI = &MF.getRegInfo();
184 DT = Aggressive ? &getAnalysis<MachineDominatorTree>() : 0;
186 bool Changed = false;
188 SmallPtrSet<MachineInstr*, 8> LocalMIs;
189 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
190 MachineBasicBlock *MBB = &*I;
191 LocalMIs.clear();
192 for (MachineBasicBlock::iterator MII = I->begin(), ME = I->end(); MII != ME;
193 ++MII) {
194 MachineInstr *MI = &*MII;
195 Changed |= OptimizeInstr(MI, MBB, LocalMIs);
199 return Changed;