lib/CodeGen/LiveStackAnalysis.cpp

   1 //===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the live stack slot analysis pass. It is analogous to
  11 // live interval analysis except it's analyzing liveness of stack slots rather
  12 // than registers.
  13 //
  14 //===----------------------------------------------------------------------===//
  15
  16 #define DEBUG_TYPE "livestacks"
  17 #include "llvm/CodeGen/LiveStackAnalysis.h"
  18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/Target/TargetRegisterInfo.h"
  21 #include "llvm/Support/Debug.h"
  22 #include "llvm/Support/raw_ostream.h"
  23 #include "llvm/ADT/Statistic.h"
  24 #include <limits>
  25 using namespace llvm;
  26
  27 char LiveStacks::ID = 0;
  28 INITIALIZE_PASS(LiveStacks, "livestacks",
  29                 "Live Stack Slot Analysis", false, false)
  30
  31 char &llvm::LiveStacksID = LiveStacks::ID;
  32
  33 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
  34   AU.setPreservesAll();
  35   AU.addPreserved<SlotIndexes>();
  36   AU.addRequiredTransitive<SlotIndexes>();
  37   MachineFunctionPass::getAnalysisUsage(AU);
  38 }
  39
  40 void LiveStacks::releaseMemory() {
  41   // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
  42   VNInfoAllocator.Reset();
  43   S2IMap.clear();
  44   S2RCMap.clear();
  45 }
  46
  47 bool LiveStacks::runOnMachineFunction(MachineFunction &) {
  48   // FIXME: No analysis is being done right now. We are relying on the
  49   // register allocators to provide the information.
  50   return false;
  51 }
  52
  53 LiveInterval &
  54 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
  55   assert(Slot >= 0 && "Spill slot indice must be >= 0");
  56   SS2IntervalMap::iterator I = S2IMap.find(Slot);
  57   if (I == S2IMap.end()) {
  58     I = S2IMap.insert(I, std::make_pair(Slot,
  59             LiveInterval(TargetRegisterInfo::index2StackSlot(Slot), 0.0F)));
  60     S2RCMap.insert(std::make_pair(Slot, RC));
  61   } else {
  62     // Use the largest common subclass register class.
  63     const TargetRegisterClass *OldRC = S2RCMap[Slot];
  64     S2RCMap[Slot] = getCommonSubClass(OldRC, RC);
  65   }
  66   return I->second;
  67 }
  68
  69 /// print - Implement the dump method.
  70 void LiveStacks::print(raw_ostream &OS, const Module*) const {
  71
  72   OS << "********** INTERVALS **********\n";
  73   for (const_iterator I = begin(), E = end(); I != E; ++I) {
  74     I->second.print(OS);
  75     int Slot = I->first;
  76     const TargetRegisterClass *RC = getIntervalRegClass(Slot);
  77     if (RC)
  78       OS << " [" << RC->getName() << "]\n";
  79     else
  80       OS << " [Unknown]\n";
  81   }
  82 }