1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/ObjectCodeEmitter.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/Target/TargetOptions.h"
34 class PPCCodeEmitter
{
36 MachineCodeEmitter
&MCE
;
38 PPCCodeEmitter(TargetMachine
&tm
, MachineCodeEmitter
&mce
):
41 /// getBinaryCodeForInstr - This function, generated by the
42 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
43 /// machine instructions.
45 unsigned getBinaryCodeForInstr(const MachineInstr
&MI
);
47 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
49 unsigned getMachineOpValue(const MachineInstr
&MI
,
50 const MachineOperand
&MO
);
52 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
53 /// its address in the function into this pointer.
55 void *MovePCtoLROffset
;
58 template <class CodeEmitter
>
59 class Emitter
: public MachineFunctionPass
, public PPCCodeEmitter
{
63 void getAnalysisUsage(AnalysisUsage
&AU
) const {
64 AU
.addRequired
<MachineModuleInfo
>();
65 MachineFunctionPass::getAnalysisUsage(AU
);
70 Emitter(TargetMachine
&tm
, CodeEmitter
&mce
)
71 : MachineFunctionPass(&ID
), PPCCodeEmitter(tm
, mce
), TM(tm
), MCE(mce
) {}
73 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
75 /// runOnMachineFunction - emits the given MachineFunction to memory
77 bool runOnMachineFunction(MachineFunction
&MF
);
79 /// emitBasicBlock - emits the given MachineBasicBlock to memory
81 void emitBasicBlock(MachineBasicBlock
&MBB
);
83 /// getValueBit - return the particular bit of Val
85 unsigned getValueBit(int64_t Val
, unsigned bit
) { return (Val
>> bit
) & 1; }
88 template <class CodeEmitter
>
89 char Emitter
<CodeEmitter
>::ID
= 0;
92 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
93 /// to the specified MCE object.
95 FunctionPass
*llvm::createPPCCodeEmitterPass(PPCTargetMachine
&TM
,
96 MachineCodeEmitter
&MCE
) {
97 return new Emitter
<MachineCodeEmitter
>(TM
, MCE
);
100 FunctionPass
*llvm::createPPCJITCodeEmitterPass(PPCTargetMachine
&TM
,
101 JITCodeEmitter
&JCE
) {
102 return new Emitter
<JITCodeEmitter
>(TM
, JCE
);
105 FunctionPass
*llvm::createPPCObjectCodeEmitterPass(PPCTargetMachine
&TM
,
106 ObjectCodeEmitter
&OCE
) {
107 return new Emitter
<ObjectCodeEmitter
>(TM
, OCE
);
110 template <class CodeEmitter
>
111 bool Emitter
<CodeEmitter
>::runOnMachineFunction(MachineFunction
&MF
) {
112 assert((MF
.getTarget().getRelocationModel() != Reloc::Default
||
113 MF
.getTarget().getRelocationModel() != Reloc::Static
) &&
114 "JIT relocation model must be set to static or default!");
116 MCE
.setModuleInfo(&getAnalysis
<MachineModuleInfo
>());
118 MovePCtoLROffset
= 0;
119 MCE
.startFunction(MF
);
120 for (MachineFunction::iterator BB
= MF
.begin(), E
= MF
.end(); BB
!= E
; ++BB
)
122 } while (MCE
.finishFunction(MF
));
127 template <class CodeEmitter
>
128 void Emitter
<CodeEmitter
>::emitBasicBlock(MachineBasicBlock
&MBB
) {
129 MCE
.StartMachineBasicBlock(&MBB
);
131 for (MachineBasicBlock::iterator I
= MBB
.begin(), E
= MBB
.end(); I
!= E
; ++I
){
132 const MachineInstr
&MI
= *I
;
133 MCE
.processDebugLoc(MI
.getDebugLoc(), true);
134 switch (MI
.getOpcode()) {
136 MCE
.emitWordBE(getBinaryCodeForInstr(MI
));
138 case TargetInstrInfo::DBG_LABEL
:
139 case TargetInstrInfo::EH_LABEL
:
140 MCE
.emitLabel(MI
.getOperand(0).getImm());
142 case TargetInstrInfo::IMPLICIT_DEF
:
143 case TargetInstrInfo::KILL
:
144 break; // pseudo opcode, no side effects
145 case PPC::MovePCtoLR
:
146 case PPC::MovePCtoLR8
:
147 assert(TM
.getRelocationModel() == Reloc::PIC_
);
148 MovePCtoLROffset
= (void*)MCE
.getCurrentPCValue();
149 MCE
.emitWordBE(0x48000005); // bl 1
152 MCE
.processDebugLoc(MI
.getDebugLoc(), false);
156 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr
&MI
,
157 const MachineOperand
&MO
) {
159 unsigned rv
= 0; // Return value; defaults to 0 for unhandled cases
160 // or things that get fixed up later by the JIT.
162 rv
= PPCRegisterInfo::getRegisterNumbering(MO
.getReg());
164 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
165 // register, not the register number directly.
166 if ((MI
.getOpcode() == PPC::MTCRF
|| MI
.getOpcode() == PPC::MFOCRF
) &&
167 (MO
.getReg() >= PPC::CR0
&& MO
.getReg() <= PPC::CR7
)) {
170 } else if (MO
.isImm()) {
172 } else if (MO
.isGlobal() || MO
.isSymbol() ||
173 MO
.isCPI() || MO
.isJTI()) {
175 if (MI
.getOpcode() == PPC::BL_Darwin
|| MI
.getOpcode() == PPC::BL8_Darwin
||
176 MI
.getOpcode() == PPC::BL_SVR4
|| MI
.getOpcode() == PPC::BL8_ELF
||
177 MI
.getOpcode() == PPC::TAILB
|| MI
.getOpcode() == PPC::TAILB8
)
178 Reloc
= PPC::reloc_pcrel_bx
;
180 if (TM
.getRelocationModel() == Reloc::PIC_
) {
181 assert(MovePCtoLROffset
&& "MovePCtoLR not seen yet?");
183 switch (MI
.getOpcode()) {
184 default: MI
.dump(); llvm_unreachable("Unknown instruction for relocation!");
189 Reloc
= PPC::reloc_absolute_high
; // Pointer to symbol
215 Reloc
= PPC::reloc_absolute_low
;
222 Reloc
= PPC::reloc_absolute_low_ix
;
229 R
= MachineRelocation::getGV(MCE
.getCurrentPCOffset(), Reloc
,
231 isa
<Function
>(MO
.getGlobal()));
232 } else if (MO
.isSymbol()) {
233 R
= MachineRelocation::getExtSym(MCE
.getCurrentPCOffset(),
234 Reloc
, MO
.getSymbolName(), 0);
235 } else if (MO
.isCPI()) {
236 R
= MachineRelocation::getConstPool(MCE
.getCurrentPCOffset(),
237 Reloc
, MO
.getIndex(), 0);
240 R
= MachineRelocation::getJumpTable(MCE
.getCurrentPCOffset(),
241 Reloc
, MO
.getIndex(), 0);
244 // If in PIC mode, we need to encode the negated address of the
245 // 'movepctolr' into the unrelocated field. After relocation, we'll have
246 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
247 // field, we get &gv. This doesn't happen for branch relocations, which are
248 // always implicitly pc relative.
249 if (TM
.getRelocationModel() == Reloc::PIC_
&& Reloc
!= PPC::reloc_pcrel_bx
){
250 assert(MovePCtoLROffset
&& "MovePCtoLR not seen yet?");
251 R
.setConstantVal(-(intptr_t)MovePCtoLROffset
- 4);
253 MCE
.addRelocation(R
);
255 } else if (MO
.isMBB()) {
257 unsigned Opcode
= MI
.getOpcode();
258 if (Opcode
== PPC::B
|| Opcode
== PPC::BL_Darwin
||
259 Opcode
== PPC::BLA_Darwin
|| Opcode
== PPC::BL_SVR4
||
260 Opcode
== PPC::BLA_SVR4
)
261 Reloc
= PPC::reloc_pcrel_bx
;
262 else // BCC instruction
263 Reloc
= PPC::reloc_pcrel_bcx
;
265 MCE
.addRelocation(MachineRelocation::getBB(MCE
.getCurrentPCOffset(),
266 Reloc
, MO
.getMBB()));
269 errs() << "ERROR: Unknown type of MachineOperand: " << MO
<< "\n";
277 #include "PPCGenCodeEmitter.inc"