lib/Target/Mips/MipsISelDAGToDAG.cpp

   1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines an instruction selector for the MIPS target.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "mips-isel"
  15 #include "Mips.h"
  16 #include "MipsISelLowering.h"
  17 #include "MipsMachineFunction.h"
  18 #include "MipsRegisterInfo.h"
  19 #include "MipsSubtarget.h"
  20 #include "MipsTargetMachine.h"
  21 #include "llvm/GlobalValue.h"
  22 #include "llvm/Instructions.h"
  23 #include "llvm/Intrinsics.h"
  24 #include "llvm/Support/CFG.h"
  25 #include "llvm/Type.h"
  26 #include "llvm/CodeGen/MachineConstantPool.h"
  27 #include "llvm/CodeGen/MachineFunction.h"
  28 #include "llvm/CodeGen/MachineFrameInfo.h"
  29 #include "llvm/CodeGen/MachineInstrBuilder.h"
  30 #include "llvm/CodeGen/MachineRegisterInfo.h"
  31 #include "llvm/CodeGen/SelectionDAGISel.h"
  32 #include "llvm/Target/TargetMachine.h"
  33 #include "llvm/Support/Debug.h"
  34 #include "llvm/Support/ErrorHandling.h"
  35 #include "llvm/Support/raw_ostream.h"
  36 using namespace llvm;
  37
  38 //===----------------------------------------------------------------------===//
  39 // Instruction Selector Implementation
  40 //===----------------------------------------------------------------------===//
  41
  42 //===----------------------------------------------------------------------===//
  43 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
  44 // instructions for SelectionDAG operations.
  45 //===----------------------------------------------------------------------===//
  46 namespace {
  47
  48 class MipsDAGToDAGISel : public SelectionDAGISel {
  49
  50   /// TM - Keep a reference to MipsTargetMachine.
  51   MipsTargetMachine &TM;
  52
  53   /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
  54   /// make the right decision when generating code for different targets.
  55   const MipsSubtarget &Subtarget;
  56
  57 public:
  58   explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
  59   SelectionDAGISel(tm),
  60   TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
  61
  62   virtual void InstructionSelect();
  63
  64   // Pass Name
  65   virtual const char *getPassName() const {
  66     return "MIPS DAG->DAG Pattern Instruction Selection";
  67   }
  68
  69
  70 private:
  71   // Include the pieces autogenerated from the target description.
  72   #include "MipsGenDAGISel.inc"
  73
  74   /// getTargetMachine - Return a reference to the TargetMachine, casted
  75   /// to the target-specific type.
  76   const MipsTargetMachine &getTargetMachine() {
  77     return static_cast<const MipsTargetMachine &>(TM);
  78   }
  79
  80   /// getInstrInfo - Return a reference to the TargetInstrInfo, casted
  81   /// to the target-specific type.
  82   const MipsInstrInfo *getInstrInfo() {
  83     return getTargetMachine().getInstrInfo();
  84   }
  85
  86   SDNode *getGlobalBaseReg();
  87   SDNode *Select(SDValue N);
  88
  89   // Complex Pattern.
  90   bool SelectAddr(SDValue Op, SDValue N,
  91                   SDValue &Base, SDValue &Offset);
  92
  93
  94   // getI32Imm - Return a target constant with the specified
  95   // value, of type i32.
  96   inline SDValue getI32Imm(unsigned Imm) {
  97     return CurDAG->getTargetConstant(Imm, MVT::i32);
  98   }
  99
 100
 101   #ifndef NDEBUG
 102   unsigned Indent;
 103   #endif
 104 };
 105
 106 }
 107
 108 /// InstructionSelect - This callback is invoked by
 109 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
 110 void MipsDAGToDAGISel::InstructionSelect() {
 111   DEBUG(BB->dump());
 112   // Codegen the basic block.
 113   DEBUG(errs() << "===== Instruction selection begins:\n");
 114   DEBUG(Indent = 0);
 115
 116   // Select target instructions for the DAG.
 117   SelectRoot(*CurDAG);
 118
 119   DEBUG(errs() << "===== Instruction selection ends:\n");
 120
 121   CurDAG->RemoveDeadNodes();
 122 }
 123
 124 /// getGlobalBaseReg - Output the instructions required to put the
 125 /// GOT address into a register.
 126 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
 127   unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
 128   return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
 129 }
 130
 131 /// ComplexPattern used on MipsInstrInfo
 132 /// Used on Mips Load/Store instructions
 133 bool MipsDAGToDAGISel::
 134 SelectAddr(SDValue Op, SDValue Addr, SDValue &Offset, SDValue &Base)
 135 {
 136   // if Address is FI, get the TargetFrameIndex.
 137   if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
 138     Base   = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
 139     Offset = CurDAG->getTargetConstant(0, MVT::i32);
 140     return true;
 141   }
 142
 143   // on PIC code Load GA
 144   if (TM.getRelocationModel() == Reloc::PIC_) {
 145     if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
 146         (Addr.getOpcode() == ISD::TargetJumpTable)){
 147       Base   = CurDAG->getRegister(Mips::GP, MVT::i32);
 148       Offset = Addr;
 149       return true;
 150     }
 151   } else {
 152     if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
 153         Addr.getOpcode() == ISD::TargetGlobalAddress))
 154       return false;
 155   }
 156
 157   // Operand is a result from an ADD.
 158   if (Addr.getOpcode() == ISD::ADD) {
 159     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
 160       if (Predicate_immSExt16(CN)) {
 161
 162         // If the first operand is a FI, get the TargetFI Node
 163         if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
 164                                     (Addr.getOperand(0))) {
 165           Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
 166         } else {
 167           Base = Addr.getOperand(0);
 168         }
 169
 170         Offset = CurDAG->getTargetConstant(CN->getZExtValue(), MVT::i32);
 171         return true;
 172       }
 173     }
 174   }
 175
 176   Base   = Addr;
 177   Offset = CurDAG->getTargetConstant(0, MVT::i32);
 178   return true;
 179 }
 180
 181 /// Select instructions not customized! Used for
 182 /// expanded, promoted and normal instructions
 183 SDNode* MipsDAGToDAGISel::Select(SDValue N) {
 184   SDNode *Node = N.getNode();
 185   unsigned Opcode = Node->getOpcode();
 186   DebugLoc dl = Node->getDebugLoc();
 187
 188   // Dump information about the Node being selected
 189   DEBUG(errs().indent(Indent) << "Selecting: ";
 190         Node->dump(CurDAG);
 191         errs() << "\n");
 192   DEBUG(Indent += 2);
 193
 194   // If we have a custom node, we already have selected!
 195   if (Node->isMachineOpcode()) {
 196     DEBUG(errs().indent(Indent-2) << "== ";
 197           Node->dump(CurDAG);
 198           errs() << "\n");
 199     DEBUG(Indent -= 2);
 200     return NULL;
 201   }
 202
 203   ///
 204   // Instruction Selection not handled by the auto-generated
 205   // tablegen selection should be handled here.
 206   ///
 207   switch(Opcode) {
 208
 209     default: break;
 210
 211     case ISD::SUBE:
 212     case ISD::ADDE: {
 213       SDValue InFlag = Node->getOperand(2), CmpLHS;
 214       unsigned Opc = InFlag.getOpcode(); Opc=Opc;
 215       assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
 216               (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
 217              "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
 218
 219       unsigned MOp;
 220       if (Opcode == ISD::ADDE) {
 221         CmpLHS = InFlag.getValue(0);
 222         MOp = Mips::ADDu;
 223       } else {
 224         CmpLHS = InFlag.getOperand(0);
 225         MOp = Mips::SUBu;
 226       }
 227
 228       SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
 229
 230       SDValue LHS = Node->getOperand(0);
 231       SDValue RHS = Node->getOperand(1);
 232
 233       EVT VT = LHS.getValueType();
 234       SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, dl, VT, Ops, 2);
 235       SDNode *AddCarry = CurDAG->getMachineNode(Mips::ADDu, dl, VT,
 236                                                 SDValue(Carry,0), RHS);
 237
 238       return CurDAG->SelectNodeTo(N.getNode(), MOp, VT, MVT::Flag,
 239                                   LHS, SDValue(AddCarry,0));
 240     }
 241
 242     /// Mul/Div with two results
 243     case ISD::SDIVREM:
 244     case ISD::UDIVREM:
 245     case ISD::SMUL_LOHI:
 246     case ISD::UMUL_LOHI: {
 247       SDValue Op1 = Node->getOperand(0);
 248       SDValue Op2 = Node->getOperand(1);
 249
 250       unsigned Op;
 251       if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
 252         Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
 253       else
 254         Op = (Opcode == ISD::UDIVREM ? Mips::DIVu : Mips::DIV);
 255
 256       SDNode *Node = CurDAG->getMachineNode(Op, dl, MVT::Flag, Op1, Op2);
 257
 258       SDValue InFlag = SDValue(Node, 0);
 259       SDNode *Lo = CurDAG->getMachineNode(Mips::MFLO, dl, MVT::i32,
 260                                           MVT::Flag, InFlag);
 261       InFlag = SDValue(Lo,1);
 262       SDNode *Hi = CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
 263
 264       if (!N.getValue(0).use_empty())
 265         ReplaceUses(N.getValue(0), SDValue(Lo,0));
 266
 267       if (!N.getValue(1).use_empty())
 268         ReplaceUses(N.getValue(1), SDValue(Hi,0));
 269
 270       return NULL;
 271     }
 272
 273     /// Special Muls
 274     case ISD::MUL:
 275     case ISD::MULHS:
 276     case ISD::MULHU: {
 277       SDValue MulOp1 = Node->getOperand(0);
 278       SDValue MulOp2 = Node->getOperand(1);
 279
 280       unsigned MulOp  = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
 281       SDNode *MulNode = CurDAG->getMachineNode(MulOp, dl,
 282                                                MVT::Flag, MulOp1, MulOp2);
 283
 284       SDValue InFlag = SDValue(MulNode, 0);
 285
 286       if (MulOp == ISD::MUL)
 287         return CurDAG->getMachineNode(Mips::MFLO, dl, MVT::i32, InFlag);
 288       else
 289         return CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
 290     }
 291
 292     /// Div/Rem operations
 293     case ISD::SREM:
 294     case ISD::UREM:
 295     case ISD::SDIV:
 296     case ISD::UDIV: {
 297       SDValue Op1 = Node->getOperand(0);
 298       SDValue Op2 = Node->getOperand(1);
 299
 300       unsigned Op, MOp;
 301       if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
 302         Op  = (Opcode == ISD::SDIV ? Mips::DIV : Mips::DIVu);
 303         MOp = Mips::MFLO;
 304       } else {
 305         Op  = (Opcode == ISD::SREM ? Mips::DIV : Mips::DIVu);
 306         MOp = Mips::MFHI;
 307       }
 308       SDNode *Node = CurDAG->getMachineNode(Op, dl, MVT::Flag, Op1, Op2);
 309
 310       SDValue InFlag = SDValue(Node, 0);
 311       return CurDAG->getMachineNode(MOp, dl, MVT::i32, InFlag);
 312     }
 313
 314     // Get target GOT address.
 315     case ISD::GLOBAL_OFFSET_TABLE:
 316       return getGlobalBaseReg();
 317
 318     /// Handle direct and indirect calls when using PIC. On PIC, when
 319     /// GOT is smaller than about 64k (small code) the GA target is
 320     /// loaded with only one instruction. Otherwise GA's target must
 321     /// be loaded with 3 instructions.
 322     case MipsISD::JmpLink: {
 323       if (TM.getRelocationModel() == Reloc::PIC_) {
 324         SDValue Chain  = Node->getOperand(0);
 325         SDValue Callee = Node->getOperand(1);
 326         SDValue T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
 327         SDValue InFlag(0, 0);
 328
 329         if ( (isa<GlobalAddressSDNode>(Callee)) ||
 330              (isa<ExternalSymbolSDNode>(Callee)) )
 331         {
 332           /// Direct call for global addresses and external symbols
 333           SDValue GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
 334
 335           // Use load to get GOT target
 336           SDValue Ops[] = { Callee, GPReg, Chain };
 337           SDValue Load = SDValue(CurDAG->getMachineNode(Mips::LW, dl, MVT::i32,
 338                                      MVT::Other, Ops, 3), 0);
 339           Chain = Load.getValue(1);
 340
 341           // Call target must be on T9
 342           Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Load, InFlag);
 343         } else
 344           /// Indirect call
 345           Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Callee, InFlag);
 346
 347         // Emit Jump and Link Register
 348         SDNode *ResNode = CurDAG->getMachineNode(Mips::JALR, dl, MVT::Other,
 349                                   MVT::Flag, T9Reg, Chain);
 350         Chain  = SDValue(ResNode, 0);
 351         InFlag = SDValue(ResNode, 1);
 352         ReplaceUses(SDValue(Node, 0), Chain);
 353         ReplaceUses(SDValue(Node, 1), InFlag);
 354         return ResNode;
 355       }
 356     }
 357   }
 358
 359   // Select the default instruction
 360   SDNode *ResNode = SelectCode(N);
 361
 362   DEBUG(errs().indent(Indent-2) << "=> ");
 363   if (ResNode == NULL || ResNode == N.getNode())
 364     DEBUG(N.getNode()->dump(CurDAG));
 365   else
 366     DEBUG(ResNode->dump(CurDAG));
 367   DEBUG(errs() << "\n");
 368   DEBUG(Indent -= 2);
 369
 370   return ResNode;
 371 }
 372
 373 /// createMipsISelDag - This pass converts a legalized DAG into a
 374 /// MIPS-specific DAG, ready for instruction scheduling.
 375 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
 376   return new MipsDAGToDAGISel(TM);
 377 }