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Simplify some code with no functionality change. Make the test a lot more
[llvm.git] / test / MC / ARM / neon-sub-encoding.s
blob241a01ffd4d42a584dd2d9838271b02d39cafbad
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
2
3 @ CHECK: vsub.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf3]
4 vsub.i8 d16, d17, d16
5 @ CHECK: vsub.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf3]
6 vsub.i16 d16, d17, d16
7 @ CHECK: vsub.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf3]
8 vsub.i32 d16, d17, d16
9 @ CHECK: vsub.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf3]
10 vsub.i64 d16, d17, d16
11 @ CHECK: vsub.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf2]
12 vsub.f32 d16, d16, d17
13 @ CHECK: vsub.i8 q8, q8, q9 @ encoding: [0xe2,0x08,0x40,0xf3]
14 vsub.i8 q8, q8, q9
15 @ CHECK: vsub.i16 q8, q8, q9 @ encoding: [0xe2,0x08,0x50,0xf3]
16 vsub.i16 q8, q8, q9
17 @ CHECK: vsub.i32 q8, q8, q9 @ encoding: [0xe2,0x08,0x60,0xf3]
18 vsub.i32 q8, q8, q9
19 @ CHECK: vsub.i64 q8, q8, q9 @ encoding: [0xe2,0x08,0x70,0xf3]
20 vsub.i64 q8, q8, q9
21 @ CHECK: vsub.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xf2]
22 vsub.f32 q8, q8, q9
23 @ CHECK: vsubl.s8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf2]
24 vsubl.s8 q8, d17, d16
25 @ CHECK: vsubl.s16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf2]
26 vsubl.s16 q8, d17, d16
27 @ CHECK: vsubl.s32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf2]
28 vsubl.s32 q8, d17, d16
29 @ CHECK: vsubl.u8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf3]
30 vsubl.u8 q8, d17, d16
31 @ CHECK: vsubl.u16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf3]
32 vsubl.u16 q8, d17, d16
33 @ CHECK: vsubl.u32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf3]
34 vsubl.u32 q8, d17, d16
35 @ CHECK: vsubw.s8 q8, q8, d18 @ encoding: [0xa2,0x03,0xc0,0xf2]
36 vsubw.s8 q8, q8, d18
37 @ CHECK: vsubw.s16 q8, q8, d18 @ encoding: [0xa2,0x03,0xd0,0xf2]
38 vsubw.s16 q8, q8, d18
39 @ CHECK: vsubw.s32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf2]
40 vsubw.s32 q8, q8, d18
41 @ CHECK: vsubw.u8 q8, q8, d18 @ encoding: [0xa2,0x03,0xc0,0xf3]
42 vsubw.u8 q8, q8, d18
43 @ CHECK: vsubw.u16 q8, q8, d18 @ encoding: [0xa2,0x03,0xd0,0xf3]
44 vsubw.u16 q8, q8, d18
45 @ CHECK: vsubw.u32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf3]
46 vsubw.u32 q8, q8, d18
47 @ CHECK: vhsub.s8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf2]
48 vhsub.s8 d16, d16, d17
49 @ CHECK: vhsub.s16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf2]
50 vhsub.s16 d16, d16, d17
51 @ CHECK: vhsub.s32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf2]
52 vhsub.s32 d16, d16, d17
53 @ CHECK: vhsub.u8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf3]
54 vhsub.u8 d16, d16, d17
55 @ CHECK: vhsub.u16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf3]
56 vhsub.u16 d16, d16, d17
57 @ CHECK: vhsub.u32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf3]
58 vhsub.u32 d16, d16, d17
59 @ CHECK: vhsub.s8 q8, q8, q9 @ encoding: [0xe2,0x02,0x40,0xf2]
60 vhsub.s8 q8, q8, q9
61 @ CHECK: vhsub.s16 q8, q8, q9 @ encoding: [0xe2,0x02,0x50,0xf2]
62 vhsub.s16 q8, q8, q9
63 @ CHECK: vhsub.s32 q8, q8, q9 @ encoding: [0xe2,0x02,0x60,0xf2]
64 vhsub.s32 q8, q8, q9
65 @ CHECK: vqsub.s8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf2]
66 vqsub.s8 d16, d16, d17
67 @ CHECK: vqsub.s16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf2]
68 vqsub.s16 d16, d16, d17
69 @ CHECK: vqsub.s32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf2]
70 vqsub.s32 d16, d16, d17
71 @ CHECK: vqsub.s64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf2]
72 vqsub.s64 d16, d16, d17
73 @ CHECK: vqsub.u8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf3]
74 vqsub.u8 d16, d16, d17
75 @ CHECK: vqsub.u16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf3]
76 vqsub.u16 d16, d16, d17
77 @ CHECK: vqsub.u32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf3]
78 vqsub.u32 d16, d16, d17
79 @ CHECK: vqsub.u64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf3]
80 vqsub.u64 d16, d16, d17
81 @ CHECK: vqsub.s8 q8, q8, q9 @ encoding: [0xf2,0x02,0x40,0xf2]
82 vqsub.s8 q8, q8, q9
83 @ CHECK: vqsub.s16 q8, q8, q9 @ encoding: [0xf2,0x02,0x50,0xf2]
84 vqsub.s16 q8, q8, q9
85 @ CHECK: vqsub.s32 q8, q8, q9 @ encoding: [0xf2,0x02,0x60,0xf2]
86 vqsub.s32 q8, q8, q9
87 @ CHECK: vqsub.s64 q8, q8, q9 @ encoding: [0xf2,0x02,0x70,0xf2]
88 vqsub.s64 q8, q8, q9
89 @ CHECK: vqsub.u8 q8, q8, q9 @ encoding: [0xf2,0x02,0x40,0xf3]
90 vqsub.u8 q8, q8, q9
91 @ CHECK: vqsub.u16 q8, q8, q9 @ encoding: [0xf2,0x02,0x50,0xf3]
92 vqsub.u16 q8, q8, q9
93 @ CHECK: vqsub.u32 q8, q8, q9 @ encoding: [0xf2,0x02,0x60,0xf3]
94 vqsub.u32 q8, q8, q9
95 @ CHECK: vqsub.u64 q8, q8, q9 @ encoding: [0xf2,0x02,0x70,0xf3]
96 vqsub.u64 q8, q8, q9
97 @ CHECK: vsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf2]
98 vsubhn.i16 d16, q8, q9
99 @ CHECK: vsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf2]
100 vsubhn.i32 d16, q8, q9
101 @ CHECK: vsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf2]
102 vsubhn.i64 d16, q8, q9
103 @ CHECK: vrsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf3]
104 vrsubhn.i16 d16, q8, q9
105 @ CHECK: vrsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf3]
106 vrsubhn.i32 d16, q8, q9
107 @ CHECK: vrsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf3]
108 vrsubhn.i64 d16, q8, q9
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