lib/CodeGen/SimpleRegisterCoalescing.h

   1 //===-- SimpleRegisterCoalescing.h - Register Coalescing --------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a simple register copy coalescing phase.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
  15 #define LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
  16
  17 #include "llvm/CodeGen/MachineFunctionPass.h"
  18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  19 #include "llvm/CodeGen/RegisterCoalescer.h"
  20 #include "llvm/ADT/BitVector.h"
  21
  22 namespace llvm {
  23   class SimpleRegisterCoalescing;
  24   class LiveVariables;
  25   class TargetRegisterInfo;
  26   class TargetInstrInfo;
  27   class VirtRegMap;
  28   class MachineLoopInfo;
  29
  30   /// CopyRec - Representation for copy instructions in coalescer queue.
  31   ///
  32   struct CopyRec {
  33     MachineInstr *MI;
  34     unsigned LoopDepth;
  35     CopyRec(MachineInstr *mi, unsigned depth)
  36       : MI(mi), LoopDepth(depth) {}
  37   };
  38
  39   class SimpleRegisterCoalescing : public MachineFunctionPass,
  40                                    public RegisterCoalescer {
  41     MachineFunction* mf_;
  42     MachineRegisterInfo* mri_;
  43     const TargetMachine* tm_;
  44     const TargetRegisterInfo* tri_;
  45     const TargetInstrInfo* tii_;
  46     LiveIntervals *li_;
  47     const MachineLoopInfo* loopInfo;
  48     AliasAnalysis *AA;
  49
  50     BitVector allocatableRegs_;
  51     DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs_;
  52
  53     /// JoinedCopies - Keep track of copies eliminated due to coalescing.
  54     ///
  55     SmallPtrSet<MachineInstr*, 32> JoinedCopies;
  56
  57     /// ReMatCopies - Keep track of copies eliminated due to remat.
  58     ///
  59     SmallPtrSet<MachineInstr*, 32> ReMatCopies;
  60
  61     /// ReMatDefs - Keep track of definition instructions which have
  62     /// been remat'ed.
  63     SmallPtrSet<MachineInstr*, 8> ReMatDefs;
  64
  65   public:
  66     static char ID; // Pass identifcation, replacement for typeid
  67     SimpleRegisterCoalescing() : MachineFunctionPass(&ID) {}
  68
  69     struct InstrSlots {
  70       enum {
  71         LOAD  = 0,
  72         USE   = 1,
  73         DEF   = 2,
  74         STORE = 3,
  75         NUM   = 4
  76       };
  77     };
  78
  79     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
  80     virtual void releaseMemory();
  81
  82     /// runOnMachineFunction - pass entry point
  83     virtual bool runOnMachineFunction(MachineFunction&);
  84
  85     bool coalesceFunction(MachineFunction &mf, RegallocQuery &) {
  86       // This runs as an independent pass, so don't do anything.
  87       return false;
  88     }
  89
  90     /// print - Implement the dump method.
  91     virtual void print(raw_ostream &O, const Module* = 0) const;
  92
  93   private:
  94     /// joinIntervals - join compatible live intervals
  95     void joinIntervals();
  96
  97     /// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
  98     /// copies that cannot yet be coalesced into the "TryAgain" list.
  99     void CopyCoalesceInMBB(MachineBasicBlock *MBB,
 100                            std::vector<CopyRec> &TryAgain);
 101
 102     /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
 103     /// which are the src/dst of the copy instruction CopyMI.  This returns true
 104     /// if the copy was successfully coalesced away. If it is not currently
 105     /// possible to coalesce this interval, but it may be possible if other
 106     /// things get coalesced, then it returns true by reference in 'Again'.
 107     bool JoinCopy(CopyRec &TheCopy, bool &Again);
 108
 109     /// JoinIntervals - Attempt to join these two intervals.  On failure, this
 110     /// returns false.  The output "SrcInt" will not have been modified, so we can
 111     /// use this information below to update aliases.
 112     bool JoinIntervals(CoalescerPair &CP);
 113
 114     /// Return true if the two specified registers belong to different register
 115     /// classes.  The registers may be either phys or virt regs.
 116     bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
 117
 118     /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
 119     /// the source value number is defined by a copy from the destination reg
 120     /// see if we can merge these two destination reg valno# into a single
 121     /// value number, eliminating a copy.
 122     bool AdjustCopiesBackFrom(const CoalescerPair &CP, MachineInstr *CopyMI);
 123
 124     /// HasOtherReachingDefs - Return true if there are definitions of IntB
 125     /// other than BValNo val# that can reach uses of AValno val# of IntA.
 126     bool HasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
 127                               VNInfo *AValNo, VNInfo *BValNo);
 128
 129     /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
 130     /// If the source value number is defined by a commutable instruction and
 131     /// its other operand is coalesced to the copy dest register, see if we
 132     /// can transform the copy into a noop by commuting the definition.
 133     bool RemoveCopyByCommutingDef(const CoalescerPair &CP,MachineInstr *CopyMI);
 134
 135     /// TrimLiveIntervalToLastUse - If there is a last use in the same basic
 136     /// block as the copy instruction, trim the ive interval to the last use
 137     /// and return true.
 138     bool TrimLiveIntervalToLastUse(SlotIndex CopyIdx,
 139                                    MachineBasicBlock *CopyMBB,
 140                                    LiveInterval &li, const LiveRange *LR);
 141
 142     /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial
 143     /// computation, replace the copy by rematerialize the definition.
 144     bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg,
 145                                  unsigned DstSubIdx, MachineInstr *CopyMI);
 146
 147     /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
 148     /// two virtual registers from different register classes.
 149     bool isWinToJoinCrossClass(unsigned SrcReg,
 150                                unsigned DstReg,
 151                                const TargetRegisterClass *SrcRC,
 152                                const TargetRegisterClass *DstRC,
 153                                const TargetRegisterClass *NewRC);
 154
 155     /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
 156     /// update the subregister number if it is not zero. If DstReg is a
 157     /// physical register and the existing subregister number of the def / use
 158     /// being updated is not zero, make sure to set it to the correct physical
 159     /// subregister.
 160     void UpdateRegDefsUses(const CoalescerPair &CP);
 161
 162     /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy.
 163     /// Return true if live interval is removed.
 164     bool ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI);
 165
 166     /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially
 167     /// extended by a dead copy. Mark the last use (if any) of the val# as kill
 168     /// as ends the live range there. If there isn't another use, then this
 169     /// live range is dead. Return true if live interval is removed.
 170     bool ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI);
 171
 172     /// RemoveDeadDef - If a def of a live interval is now determined dead,
 173     /// remove the val# it defines. If the live interval becomes empty, remove
 174     /// it as well.
 175     bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
 176
 177     /// RemoveCopyFlag - If DstReg is no longer defined by CopyMI, clear the
 178     /// VNInfo copy flag for DstReg and all aliases.
 179     void RemoveCopyFlag(unsigned DstReg, const MachineInstr *CopyMI);
 180
 181     /// lastRegisterUse - Returns the last use of the specific register between
 182     /// cycles Start and End or NULL if there are no uses.
 183     MachineOperand *lastRegisterUse(SlotIndex Start, SlotIndex End,
 184                                     unsigned Reg, SlotIndex &LastUseIdx) const;
 185   };
 186
 187 } // End llvm namespace
 188
 189 #endif