1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
4 declare i4 @llvm.ssub.sat.i4(i4, i4)
5 declare i8 @llvm.ssub.sat.i8(i8, i8)
6 declare i16 @llvm.ssub.sat.i16(i16, i16)
7 declare i32 @llvm.ssub.sat.i32(i32, i32)
8 declare i64 @llvm.ssub.sat.i64(i64, i64)
10 define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
11 ; CHECK-LABEL: func32:
13 ; CHECK-NEXT: mul w8, w1, w2
14 ; CHECK-NEXT: subs w10, w0, w8
15 ; CHECK-NEXT: mov w9, #2147483647
16 ; CHECK-NEXT: cmp w10, #0 // =0
17 ; CHECK-NEXT: cinv w9, w9, ge
18 ; CHECK-NEXT: subs w8, w0, w8
19 ; CHECK-NEXT: csel w0, w9, w8, vs
22 %tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %a)
26 define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
27 ; CHECK-LABEL: func64:
29 ; CHECK-NEXT: subs x8, x0, x2
30 ; CHECK-NEXT: mov x9, #9223372036854775807
31 ; CHECK-NEXT: cmp x8, #0 // =0
32 ; CHECK-NEXT: cinv x8, x9, ge
33 ; CHECK-NEXT: subs x9, x0, x2
34 ; CHECK-NEXT: csel x0, x8, x9, vs
37 %tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %z)
41 define i16 @func16(i16 %x, i16 %y, i16 %z) nounwind {
42 ; CHECK-LABEL: func16:
44 ; CHECK-NEXT: mul w8, w1, w2
45 ; CHECK-NEXT: lsl w9, w0, #16
46 ; CHECK-NEXT: subs w11, w9, w8, lsl #16
47 ; CHECK-NEXT: mov w10, #2147483647
48 ; CHECK-NEXT: cmp w11, #0 // =0
49 ; CHECK-NEXT: cinv w10, w10, ge
50 ; CHECK-NEXT: subs w8, w9, w8, lsl #16
51 ; CHECK-NEXT: csel w8, w10, w8, vs
52 ; CHECK-NEXT: asr w0, w8, #16
55 %tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %a)
59 define i8 @func8(i8 %x, i8 %y, i8 %z) nounwind {
62 ; CHECK-NEXT: mul w8, w1, w2
63 ; CHECK-NEXT: lsl w9, w0, #24
64 ; CHECK-NEXT: subs w11, w9, w8, lsl #24
65 ; CHECK-NEXT: mov w10, #2147483647
66 ; CHECK-NEXT: cmp w11, #0 // =0
67 ; CHECK-NEXT: cinv w10, w10, ge
68 ; CHECK-NEXT: subs w8, w9, w8, lsl #24
69 ; CHECK-NEXT: csel w8, w10, w8, vs
70 ; CHECK-NEXT: asr w0, w8, #24
73 %tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %a)
77 define i4 @func4(i4 %x, i4 %y, i4 %z) nounwind {
80 ; CHECK-NEXT: mul w8, w1, w2
81 ; CHECK-NEXT: lsl w9, w0, #28
82 ; CHECK-NEXT: subs w11, w9, w8, lsl #28
83 ; CHECK-NEXT: mov w10, #2147483647
84 ; CHECK-NEXT: cmp w11, #0 // =0
85 ; CHECK-NEXT: cinv w10, w10, ge
86 ; CHECK-NEXT: subs w8, w9, w8, lsl #28
87 ; CHECK-NEXT: csel w8, w10, w8, vs
88 ; CHECK-NEXT: asr w0, w8, #28
91 %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)