[ARM] Correct register for narrowing and widening MVE loads and stores.
[llvm-core.git] / docs / AMDGPU / gfx7_dst_flat_atomic64.rst
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8 .. _amdgpu_synid7_dst_flat_atomic64:
10 vdst
11 ===========================
13 Data returned by a 64-bit atomic flat instruction.
15 This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
17 *Size:* 2 dwords.
19 *Operands:* :ref:`v<amdgpu_synid_v>`