[ARM] Correct register for narrowing and widening MVE loads and stores.
[llvm-core.git] / docs / AMDGPU / gfx10_dst_buf_lds.rst
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8 .. _amdgpu_synid10_dst_buf_lds:
10 vdst
11 ===========================
13 Instruction output: data read from a memory buffer.
15 If :ref:`lds<amdgpu_synid_lds>` is specified, this operand is ignored by H/W and data are stored directly into LDS.
17 *Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
19     Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
21 *Operands:* :ref:`v<amdgpu_synid_v>`