test/tools/llvm-mca/ARM/m4-targetfeatures.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=arm-none-none-eabi -mcpu=cortex-m4 -mattr=+fp64 -instruction-tables < %s | FileCheck %s
   3
   4 vadd.f32 s0, s2, s2
   5 vadd.f64 d0, d2, d2
   6
   7 # CHECK:      Instruction Info:
   8 # CHECK-NEXT: [1]: #uOps
   9 # CHECK-NEXT: [2]: Latency
  10 # CHECK-NEXT: [3]: RThroughput
  11 # CHECK-NEXT: [4]: MayLoad
  12 # CHECK-NEXT: [5]: MayStore
  13 # CHECK-NEXT: [6]: HasSideEffects (U)
  14
  15 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  16 # CHECK-NEXT:  1      1     1.00                        vadd.f32        s0, s2, s2
  17 # CHECK-NEXT:  1      1     1.00                        vadd.f64        d0, d2, d2
  18
  19 # CHECK:      Resources:
  20 # CHECK-NEXT: [0]   - M4Unit
  21
  22 # CHECK:      Resource pressure per iteration:
  23 # CHECK-NEXT: [0]
  24 # CHECK-NEXT: 2.00
  25
  26 # CHECK:      Resource pressure by instruction:
  27 # CHECK-NEXT: [0]    Instructions:
  28 # CHECK-NEXT: 1.00   vadd.f32   s0, s2, s2
  29 # CHECK-NEXT: 1.00   vadd.f64   d0, d2, d2