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[InstCombine] Signed saturation patterns
[llvm-core.git]
/
test
/
Assembler
/
2004-06-07-VerifierBug.ll
blob
2fc0ae29ca7b803bc27413d44ab83ecb27a4e219
1
; RUN: llvm-as < %s > /dev/null
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; RUN: verify-uselistorder %s
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define void @t() {
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entry:
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ret void
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loop: ; preds = %loop
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%tmp.4.i9 = getelementptr i32, i32* null, i32 %tmp.5.i10 ; <i32*> [#uses=1]
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%tmp.5.i10 = load i32, i32* %tmp.4.i9 ; <i32> [#uses=1]
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br label %loop
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}