[InstCombine] Signed saturation patterns
[llvm-core.git] / lib / Target / ARM / Thumb1InstrInfo.h
blobbc433e7a7a931377c51efe5c5220783985e16fe3
1 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
14 #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
16 #include "ARMBaseInstrInfo.h"
17 #include "ThumbRegisterInfo.h"
19 namespace llvm {
20 class ARMSubtarget;
22 class Thumb1InstrInfo : public ARMBaseInstrInfo {
23 ThumbRegisterInfo RI;
24 public:
25 explicit Thumb1InstrInfo(const ARMSubtarget &STI);
27 /// Return the noop instruction to use for a noop.
28 void getNoop(MCInst &NopInst) const override;
30 // Return the non-pre/post incrementing version of 'Opc'. Return 0
31 // if there is not such an opcode.
32 unsigned getUnindexedOpcode(unsigned Opc) const override;
34 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
35 /// such, whenever a client has an instance of instruction info, it should
36 /// always be able to get register info as well (through this method).
37 ///
38 const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
40 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
41 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
42 bool KillSrc) const override;
43 void storeRegToStackSlot(MachineBasicBlock &MBB,
44 MachineBasicBlock::iterator MBBI,
45 unsigned SrcReg, bool isKill, int FrameIndex,
46 const TargetRegisterClass *RC,
47 const TargetRegisterInfo *TRI) const override;
49 void loadRegFromStackSlot(MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator MBBI,
51 unsigned DestReg, int FrameIndex,
52 const TargetRegisterClass *RC,
53 const TargetRegisterInfo *TRI) const override;
55 bool canCopyGluedNodeDuringSchedule(SDNode *N) const override;
56 private:
57 void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
61 #endif